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Type: Posts; User: vivekroy

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by vivekroy
Replies
9
Views
561

### Closed: Re: Loadpull for Differential PA

Look at the symbol of a balun very carefully and you will see what we mean.
2. ## Thread: question about Friis equation with very large antenna gain

by vivekroy
Replies
2
Views
164

### Closed: Re: question about Friis equation with very large antenna gain

Exactly as FvM mentioned. If Pr/Pt > 1, then it would also mean lambda/4piD >1 ==> D<lambda/4pi
But by definition, far field extends upto infinity. Therefore the above conjecture is incorrect.
3. ## Thread: Overdrive voltage relationship to the op-amp speed

by vivekroy
Replies
8
Views
508

### Closed: Re: Overdrive voltage relationship to the op-amp speed

Also increasing current increases speed in another way. The current available during slewinv increases.
4. ## Thread: differential amplifier design using ngspice

by vivekroy
Replies
5
Views
294

### Closed: Re: differential amplifier design using ngspice

Why do you have 'dff' before endc?

AFAIK, a control section in NGSpice starts with a .control keyword and ends with .endc

Also, have you tried adding a .save all before the control section?
...
5. ## Thread: Closed loop gain of this fully-differential amplifier

by vivekroy
Replies
3
Views
273

### Closed: Re: Closed loop gain of this fully-differential amplifier

Yes.. If A0 is large (and is typically the case) then the 'x' term will be such that x<<1..
6. ## Thread: Overdrive voltage relationship to the op-amp speed

by vivekroy
Replies
8
Views
508

### Closed: Re: Overdrive voltage relationship to the op-amp speed

Vgs-Vth is called the overdrive in many textbooks.. Vth is the minimum drive required and anything above that is "over"-drive. :D

P.S. Even Wikipedia has an article on it:...
7. ## Thread: Overdrive voltage relationship to the op-amp speed

by vivekroy
Replies
8
Views
508

### Closed: Re: Overdrive voltage relationship to the op-amp speed

GBW = gm/2piCl and it increases linearly with increasing overdrive only if you increase it by increasing the current and not changing the W/L. If you keep the current constant and then increase the...
8. ## Thread: -3db frequency of the op-amp open loop gain

by vivekroy
Replies
11
Views
708

### Closed: Re: -3db frequency of the op-amp open loop gain

Slewing is the most important characteristic I think as well.

Assume that there is a two stage amplifier with the dominant pole at the end of the first stage. Assume that the input difference is...
9. ## Thread: S parameter extraction for MOSFET internal parameters

by vivekroy
Replies
10
Views
596

### Closed: Re: S parameter extraction for MOSFET internal parameters

I think what the OP is trying to refer to is that he is using s-parameter analysis in Cadence Spectre. During sp analysis, it also gives you two port Y and Z parameters which can be used to get a...
10. ## Thread: -3db frequency of the op-amp open loop gain

by vivekroy
Replies
11
Views
708

### Closed: Re: -3db frequency of the op-amp open loop gain

Yes, for open loop -3dB is an important point.
11. ## Thread: S parameter extraction for MOSFET internal parameters

by vivekroy
Replies
10
Views
596

### Closed: Re: S parameter extraction for MOSFET internal parameters

It was HiCUM. Gummel Poon is quite limited for its use in a PA.

But I get what you are saying. I will check it in a CMOS process.

by vivekroy
Replies
9
Views
561

### Closed: Re: Loadpull for Differential PA

I inferred that you are doing mmwave from your previous posts. If that is the case, that current source will eat away unnecessary voltage headroom. I read somewhere that people don't use the current...
13. ## Thread: -3db frequency of the op-amp open loop gain

by vivekroy
Replies
11
Views
708

### Closed: Re: -3db frequency of the op-amp open loop gain

If you want to use your op-amp as a crude open loop comparator, your -3dB can play some role in the initial part of the output before slewing effects take over.
14. ## Thread: Parasitic capacitor extraction: huge value

by vivekroy
Replies
9
Views
824

### Closed: Re: Parasitic capacitor extraction: huge value

I don't think that value is unrealistic. For example, in PTM from ASU (http://ptm.asu.edu/modelcard/HP/22nm_HP.pm) I see similar values. But what you have printed is the model parameters (parameters...
15. ## Thread: S parameter extraction for MOSFET internal parameters

by vivekroy
Replies
10
Views
596

### Closed: Re: S parameter extraction for MOSFET internal parameters

400f and 96f are quite far apart. I have done similar measurements in bipolar transistors at 28GHz and 60GHz but it was never this far off.

Refer to the paper, "Parameter extraction technique for...
16. ## Thread: How do you choose input power while doing loadpull?

by vivekroy
Replies
8
Views
775

### Closed: Re: How do you choose input power while doing loadpull?

The pout for optimum load is the pout you would get if you connected the optimum load (from loadpull simulation) and put in the input power at which you did the loadpull.

It is not necessary to...
17. ## Thread: How to calculate bandwidth for this circuit, including lower and higher cut off freq

by vivekroy
Replies
5
Views
657

### Closed: Re: How to calculate bandwidth for this circuit, including lower and higher cut off f

But doesn't this look like a stacked power amplifier? Do we need to care about open loop stability of a power amplifier? If we can get rid of the feedforward impedance, then for passive terminations,...

by vivekroy
Replies
15
Views
793

### Closed: Re: Problem in plotting I/O waveform in Cadence

Use the delay function to plot the delay between the two wave-forms and then do a Y vs Y plot.
Alternatively you can save both your voltage/current/charge waveform and your delay waveform in csv...
19. ## Thread: Verilog-a code to latch analog voltages

by vivekroy
Replies
7
Views
470

### Closed: Re: Verilog-a code to latch analog voltages

Here you go

// VerilogA code

`include "constants.vams"
`include "disciplines.vams"

module veriloga_latch(vin,vclk,vout_sampled);
input vin,vclk;
20. ## Thread: Verilog-a code to latch analog voltages

by vivekroy
Replies
7
Views
470

### Closed: Re: Verilog-a code to latch analog voltages

Look at page 113 of http://www.lumerink.com/docs/VerilogA.pdf

by vivekroy
Replies
15
Views
793

### Closed: Re: Problem in plotting I/O waveform in Cadence

Connect a capacitor to your charge pump output. Make sure its large enough so that when the CP turn on, the voltage does not change too much.

22. ## Thread: In PA, if the bias is VDD then how can swing be 2*VDD with inductive load

by vivekroy
Replies
2
Views
315

### Closed: Re: In PA, if the bias is VDD then how can swing be 2*VDD with inductive load

You have the explanation there.

If you want more insight into such behavior, refer to "Pulse, Digital and Switching Waveform" by Millman and Taub.
23. ## Thread: Changing the 'VSS' value in CppSim

by vivekroy
Replies
0
Views
182

### Closed: Changing the 'VDD' and 'VSS' value in CppSim

By default most digital blocks in CppSim have an output between -1 and 1. I want it to be between an user-defined fixed set of values, for eg. 0 and 1.8. Till now I have been using a multiplier...
24. ## Thread: Help on Ocean scripting: run one analysis and use that results in another

by vivekroy
Replies
8
Views
552

### Closed: Re: Help on Ocean scripting: run one analysis and use that results in another

I don't like using calcVal in global variables. I always prefer using it in local variables. (Make sure to disable the global variables by unchecking the box next to the respective global variable)
25. ## Thread: Help on Ocean scripting: run one analysis and use that results in another

by vivekroy
Replies
8
Views
552

### Closed: Re: Help on Ocean scripting: run one analysis and use that results in another

Yeah, it is not a calculator function.

I think maybe the SKILL Language Reference Manual?

Or maybe in the SKILL API Finder which can be invoked from the Virtuoso CIW Window.
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