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Type: Posts; User: big_fudge98

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  1. Replies
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    199

    Closed: Re: Ambiguous result with Analog I/O

    Can we not use that I/O for passing analog signals? If not, what I/O do we use?
  2. Replies
    3
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    199

    Closed: Ambiguous result with Analog I/O

    Hi, I am using PVDD1ANA as my I/O with TSMC 0.18um technology. When I try to pass any signal through the I/O, it is getting attenuated quite a lot. The I/O seems to be acting as a 2 Mohm resistor in...
  3. Closed: Re: Biasing an array of current steering DACs

    Thanks.
    What exactly is the 'segmented' one?
  4. Closed: Re: Biasing an array of current steering DACs

    Yes. But can I directly mirror currents to 128 DAC's from the current source? Or should I do it in stages?
  5. Closed: Biasing an array of current steering DACs

    Hi, I would like to bias an array of 128 current steering DAC's. I have made a current source as well. How would I bias 128 DAC's using this single current source? If I bias all 128 directly, would...
  6. Closed: Re: Modelling power supply for cadence simulations

    Somebody from the industry suggested that I use the mentioned value of inductance.
    If I am taking the source from an external power suppy, how should I model it for Cadence simulations? Would a...
  7. Closed: Modelling power supply for cadence simulations

    Hi all,

    I am designing a circuit which will be taped-out soon. So I need to simulate with real sources. I plan to use QFN 100 packaging which would add 10 nH and 3pH.

    How can I model the...
  8. Closed: Re: RHP zero cancellation in miller compensated opamp

    So if the phase margin is greater than 60 without RHP zero cancellation, I am safe, correct?
  9. Closed: RHP zero cancellation in miller compensated opamp

    Hi all,

    I have designed a subtheshold opamp with UGB = 20 kHz. I calculated the RHP zero to be at 250 kHz. Should I go for RHP zero cancellation by adding a resistance before the compensation...
  10. Replies
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    Closed: Analog Layout - Sharing source/drain

    Hi all,

    I have recently done layouts of some analog blocks such as op-amps, current source etc. Upon getting them reviewed by an experienced individual from the industry, I recieved the following...
  11. Replies
    4
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    528

    Closed: Resistor Layout - Guard Ring

    Hi all!
    I am using an rphripoly resistor in TSMC 0.18um pdk. Should I use nwell guardring or psub guard ring? Why?
    Thanks!
  12. Replies
    2
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    1,154

    Closed: PLL Lock range and capture range

    Why is the lock range of a PLL larger than the capture range?
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