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Type: Posts; User: pancho_hideboo

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  1. Closed: Re: SystemVerilog Behavioral Simulation in Cadence Virtuoso/AMS/Incisive/Spectre

    https://designers-guide.org/forum/YaBB.pl?num=1574282166

    Use file name of ď*.svĒ.

    Surely understand basic things correctly before EDA Tool Play.
    This is very true for all your previous posts.
  2. Closed: Re: $freq while using AC analysis to access lookup table

    Use spectre primitive, nport.

    If you use Keysight ADSsim, use DAC(Data Access Component).

    https://www.edaboard.com/showthread.php?364412/page2#23
  3. Closed: Re: $freq while using AC analysis to access lookup table

    If you mean Verilog-A, $freq is not available in Verilog-A.

    https://www.edaboard.com/showthread.php?373837#6
  4. Closed: Re: Spectre RF Envelope Simulation for Wireless Transmitter with Switched-Cap Baseban

    Simply do one tone(LO) envelope analysis.
    fs and DAC output are treated as baseband signal.
    Thatís all.
  5. Closed: Re: Is it possible to eliminate harmonics when operated in compression

    Use resonator tank, if your PA is for narrowband application.
    Otherwise, use low pass filter.

    Surely learn very basic things before EDA Tool Play.
  6. Closed: Re: Plotting QAM 16 constellation in Cadence

    See followings.
    https://designers-guide.org/forum/YaBB.pl?num=1260978648
    https://designers-guide.org/forum/YaBB.pl?num=1264511244/3#3
    https://designers-guide.org/forum/YaBB.pl?num=1270105534/1#1
  7. Closed: Re: Plotting QAM 16 constellation in Cadence

    Use skill function in Cadence ViVA.
    Simply x-y plot with sampling at appropriate time points.

    Regarding EVM, calculate rms error value between output signal and reference signal.
  8. [SOLVED]Closed: Re: How to extract Voltage of a schematic net in ADS ?

    Simply add label to net.
  9. Closed: Re: Reflections when conjugately matched

    Voltage wave is reflected.

    Surely read and learn Power wave in Pozarís Book, before EDA Tool Play.

    See the followings.
    https://www.edaboard.com/showthread.php?378353#5...
  10. Closed: Re: Noise calculation in static-dynamic circuit

    Yes........
  11. Closed: Re: Output Impedance Of a Triple cascode

    Negative real part is due to Y12.

    You donít care about feedback path of each MOSFET at all.

    Surely learn very basic things before EDA Tool Play which you like.
  12. Closed: Re: Running different type of simulation in one environment

    Actually it is not at same time, if you use Cadence-ADE-XL(GXL).
    It is multiple launchs of simulation.

    Synopsys HSPICE and Keysight ADSsim have optimizer in simulator.
    However Cadence Spectre...
  13. Closed: Re: Noise calculation in static-dynamic circuit

    It is possible, if you can define gain.
    Can you define gain ?
  14. Closed: Re: How to measure the C parasitic (internal capacitance) of an inverter using Spectr

    I mean simulator has no relation to measuring of Cpar or simulator can not measure Cpar.
  15. Closed: Re: Running different type of simulation in one environment

    ADE is no more than assistant of generation of netlist and launcher of simulation.
    So you can do any AC analyses.
    Understand operation of ADE which is very unefficent and generate many netlists and...
  16. Closed: Re: Running different type of simulation in one environment

    Simply do all simulations at same time.
    And define goals.
    There is no difference of AC, Transient, DC for optimizer.
    They are no more than numeric values for optimizer.
  17. [SOLVED]Closed: Re: Making a mathematical expression between two parameters in ADE GXL output setup w

    Can you understand discrete optimizer ?
    You have to set precise grids.
    For example, assume 1 <= x <= 10.
    We don't have to set delta_x in continuous optimizer.
    Here optimizer samples x in adaptive...
  18. [SOLVED]Closed: Re: Making a mathematical expression between two parameters in ADE GXL output setup w

    abs(I(M7)-I(M6)).
    Or abs(I(M7)-I(M6))/abs(I(M7))

    However donít expect good performance of optimizer in Cadence ADE-GXL.
    It is discrete optimizer not continuous one.
    And performance itself is...
  19. Closed: Re: How to plot Loadline in cadence spectre

    This has no relation to Cadence Spectre at all.

    Simply it is postprocessing.
    If you use Cadence ViVA with PSF data, use skill function waveVsWave() function.
    That’s all.
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    Closed: Re: How to simulate flip flop noise

    Use Shooting-Newton-PSS/Tdnoise in Cadence Spectre.

    .
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    Closed: Re: CMOS varactor in cadence

    You can not design anything in Cadence.

    Or do you mean an outsource design service in Cadence ?

    Use correct terminology .
  22. Closed: Re: How to measure the C parasitic (internal capacitance) of an inverter using Spectr

    Use Cadence QRC or Assura from layout not schematic.

    It has no relation to simulator at all.
  23. Closed: Re: Difference in the reactive part between loadpull simulation and large signal spar

    Answer my question.


    It is too elementary thing.
    It is mathematical basic about uniqueness of solution.

    Before termination condition, can you understand drive direction's difference ?

    This...
  24. Closed: Re: How to measure the C parasitic (internal capacitance) of an inverter using Spectr

    Simply Puppet123 can not understand basic things at all.
    See all his previous posts.
    Thatís all.
  25. Closed: Re: How to measure the C parasitic (internal capacitance) of an inverter using Spectr

    It sees an input of second inverter.
    It is not Cpar.
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