Search:

Type: Posts; User: Junus2012

Page 1 of 20 1 2 3 4

Search: Search took 0.02 seconds.

  1. Closed: Re: Netlist is different between schematic and layout

    Dear Suta,

    Thank you for your reply, I ment I tried your suggestion but doesnt fix the problem

    Dear Dominik,

    Thank you once again for your useful explanation, I have removed the 1.65 source...
  2. Closed: Re: Netlist is different between schematic and layout

    Dear Dominik,

    It is very helpful and excellent answer and help, I am very sincerely to you for this big effort

    Through your explanation, I now understand that this kind of resistor can not work...
  3. Closed: Re: Netlist is different between schematic and layout

    Dear Dominik,

    Thank you for your answer,

    In fact I didn"t get what you mean by diode and how it is making the schematic simulation is different from the layout ?

    As I have also mentioned...
  4. Closed: Re: Netlist is different between schematic and layout

    Dear friends,

    first I would like to thank you for your reply,

    here is the schematic of the MOS resistor, I am using bulk connected to source for these PMOS based resistor,

    157845

    below is...
  5. Closed: Netlist is different between schematic and layout

    Hello,

    I have designed simple voltage devider MOS resistor, the circuit is working fine in schematic, with the layout there is no issue, LVS is giving o error. However, in the simulation they are...
  6. Closed: Design CMOS transmission gate for digital switch in programmable resistors

    Dear friends,

    I see most of the designers makes the PMOS transistor three times bigger than NMOS (to compensate for mobility difference) when designing the TG, what this lead in actual circuit...
  7. Closed: Optimum strategy to layout MOSFET cascoded mirror

    Hello,

    in the image down is the known wide swing mirror.

    157667

    Kindly I need your discussion about layout this circuit.

    1. I have two approaches, in the first one I would layout M1 and...
  8. Closed: Re: Active and inactive dummy transistors in the matched array transistors

    Dear Suta,

    Speaking only about the cascoded transistors which I am going to match them alone, below you see the array plan of the matched transistors,

    157665

    as you see since these...
  9. Closed: Re: Active and inactive dummy transistors in the matched array transistors

    Dear Suta,

    Thank you for your help,

    So you are suggesting to modefy scheme 3 by connecting the gate to the ground and not sharing it with the array gate transistors as proposed by holberg in...
  10. Closed: Re: Active and inactive dummy transistors in the matched array transistors

    Ok I got your point now,

    that is hy you said in the second scheme the down transistors have no problem as they share the ground mean they share the source which helps me to make them in the same...
  11. Closed: Re: Active and inactive dummy transistors in the matched array transistors

    Dear Suta,
    Thank you for the reply,

    Actually I didnt understand what you mean by "dummies need to be in the same OD as the active MOS" ?

    It means in scheme 2, the down transistors are ok for...
  12. Closed: Re: Different transistor orientation in different matched MOS array

    Dear friends,

    thanbk you for your reply

    Suppose it is the case of this cascode mirror, I matched M1, M2 in array A and M3, M4 in array B.

    According to what I understood from you it is ok for...
  13. Closed: Different transistor orientation in different matched MOS array

    Dear friends,

    I completely understand that matched transistor in an array must have the same orientation so my question id different from this case.

    it is about if for example we have two...
  14. Closed: Active and inactive dummy transistors in the matched array transistors

    Dear friends,

    below are the suggeted three connection of dummy transistors to the cascoded circuit.

    In the first two schemes the dummy transistors are off as thier VGS tied to zero. However, ...
  15. Closed: Controlling partial or the whole current in CMFB

    Dear friends,

    many designers use the CMFB amplifier to control the whole current of the intended branch, some others control half of it and provide the second part from normal biasing scheme. Some...
  16. Replies
    5
    Views
    528

    Closed: Re: Maximum current of the CMFB circuit

    Dear Erikl and Suta,

    I understand well your explanation about the gain and stability, I have no doupt about it indeed.

    My question was different but I might expressed it wrong,

    I was saying...
  17. Replies
    5
    Views
    528

    Closed: Maximum current of the CMFB circuit

    Dear friends,

    attached the two CMFB amplifier in which I want to compare,

    the first one can give maximum cuurent to correct the output common mode voltage of 2Ib as it is a diode connected load...
  18. Closed: Re: indivisual out different from differential output in fully differential amplifier

    thank you Suta, talking about the fully differential signal I would say I have no problem but looking to each output then it is sparking
  19. Closed: Re: CMFB biasing current in fully differential Opamp with adaptive current source

    Dear Erikl,

    I spent a lot of time to see some people if they adaptively supplying the CMFB ampliifer and indeed I never find. It looks for me that CMFB is to control the circuit under small...
  20. Closed: Re: indivisual out different from differential output in fully differential amplifier

    Dear friends,

    these result are from simulation
    and it is targeted for the sample and hold circuit

    if I want to calculate the settling time do i need to calculate it for the single ended of...
  21. Closed: indivisual out different from differential output in fully differential amplifier

    Hello,

    attached is the transient pic of the fully differential amplifier I have designed,

    if you look to the vo+ and vo- you will see the sparks on it, however the differential coltage is...
  22. Closed: Re: Simulating the slew rate with capacitive feedback fully differential amplifier

    Thsnk you Suta,

    I mean ideal switches
  23. Closed: Re: Simulating the slew rate with capacitive feedback fully differential amplifier

    Dear Suta,
    Thank you for your help

    I have two questions,

    1. I have designed my OTA with continuous time CMFB circuit, will it be a problem or it is only optional to design SC CMFB ?
    2. Are...
  24. Closed: Re: Wide swing cascode mirror with variable input current

    Thank you Suta,

    Sure now one must consider the small signal behavioural, like the bandwidth of the circuit since the added cap will load the op-amp, therefore, I have selected the minimum cap...
  25. Closed: Re: Wide swing cascode mirror with variable input current

    Dear Suta,

    Recently I read many papers about this issue,
    I found the solution for this, that is the only way is to bias the diode transistor with a current that track the input change, one...
Results 1 to 25 of 500
Page 1 of 20 1 2 3 4