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  1. Replies
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    [SOLVED]Closed: Re: Injection XFMR source level

    Thanks FvM for your help.

    Here are the results.

    XFMR designed as follows:
    Core material: VAC T60006-L2050-W516
    Windings: bifilar wound 50 turns, AWG 19


    Measurements using a sweep from...
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    Closed: Re: RF PCB design in altium

    That is too big a constraint. Controlled line impedance starts at more than 1/4 wavelenght.. Why do you use that number ?
  3. [SOLVED]Closed: Re: can flux from switching inductors cause interference

    Actually it is good. The closer the ground plane to the inductor, the less interference it will produce due to more compact magnetic field lines.
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    [SOLVED]Closed: Re: Injection XFMR source level

    Sure. 24 mVrms for 10 ohms load.

    As you say, once you know they use a 50 ohm VNA, it is easily calculable the source signal level. I do not get your "no sense statement" or "ambiguous...
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    [SOLVED]Closed: Re: Injection XFMR source level

    Why does not ? Why would you want load and source matching for no more than 10 MHz ?


    I do not want to buy a 500$ XFMR, so I wound one myself. I want to compare mine with their, so I want to...
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    [SOLVED]Closed: Injection XFMR source level

    Hello everyone,

    What is the source signal level the B-WIT 100 injection XFMR gain response was characterized with ?

    I think it is 0.27V of amplitude (i.e. ~0.2 V RMS) if source is 50 ohms, but...
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    [SOLVED]Closed: Re: Negative VCO transfer function

    Alright. That was it. I was missing the triangle wave of the XOR phase detector. Since kVCO<0, the PLL will lock in the [Π, 2*Π] interval where kPD<0.
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    [SOLVED]Closed: Re: Negative VCO transfer function

    Well yes it does. As I mentioned, the loop gain is phase shifted with additional 180º making it unstable.

    PLL is implemented as: XOR phase detector kpd>0 --> LPF --> kVCO<0 (for XR2206) can you...
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    [SOLVED]Closed: Re: Negative VCO transfer function

    What if the PLL is working with an XOR gate ?
  10. Replies
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    [SOLVED]Closed: Negative VCO transfer function

    Hello everyone,

    The VCO XR2206 shows at page 11 that the kVCO is negative. That introduces 180º phase in the transfer function of a PLL making it unstable. How can PLLs built around XR2206 work ?...
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    Closed: Re: Designing a simple Isolated DC/DC converter

    Not necessarily.

    Linear technology (ADI) uses the Royer oscillator for their WPT DC DC converters (LTC4120 charger, check it on YouTube) (more on app note 138).
  12. Closed: Re: Problem generating polygon pour in Altium 17.1

    Your board is full of errors, in particular:
    -board outline constraint
    -silk to pad constraint e.g. U6,U7,U8 which have silkscreen over the pad. That is not good practice.
    -clearance constraint...
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    Closed: Re: How can I improve this circuit ?

    There is a thing I do not understand. Why use a linear supply with a big expensive 50 Hz XFMR when cheap small SMPS modules are selling for less than 10 € ?
  14. Closed: Re: Problem generating polygon pour in Altium 17.1

    Did you assign the net when doing the pour ? Attach project file if you can.
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    Closed: Re: 1.2KW Full Bridge Converter

    No PFC for 1.2 kW?

    AL=1720*(4*Pi*10^-7)/(0.6*10^3)=3602,36 nH , close to datasheet value.
    Reluctance=1/[1720*(4*Pi*10^-7)] *(0.6*10^3)=277595,831 H^-1
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    Closed: Re: Altium Design Schematic Library

    I do not know any "automatic" way. But it takes you about 3 seconds to perform what I said. So, 20 schematic libraries in 1 minute.. it is not that long time.
  17. Closed: Re: Voltage single phase active front end rectifier - simulation problem

    Sorry for the mistake. IGBT only makes sense for V1 and V44. Why do your reference suggest for V3 and V2 as well ?
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    Closed: Re: Altium Design Schematic Library

    1) Open schematic library 1 -> right click -> select all -> copy
    2) Open schematic library 2 -> right click -> paste
    Done. Same for PCB library.
  19. Closed: Re: Voltage single phase active front end rectifier - simulation problem

    I managed to simulate it up to a point, where convergence problems appear again. However, I believe that using IGBTs is wrong because the control signals (PWM1+ and PWM1-) turns ON the IGBT which...
  20. Closed: Re: How to make a better design for this SMPS post regulator filter circuit?

    How ? Even if we knew the exact output impedance, the voltage source (notice I am not referring to the SMPS, but just to a simple voltage source i.e. it does not represent the SMPS) would still...
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    Closed: Re: About Impedance matching

    Yes. In cases where reflection is negligible (i.e. wavelenght is much higher than the T line length), it is not necessary to have matching. I mean, you can design your PA to deliver the necessary...
  22. Closed: Re: How to make a better design for this SMPS post regulator filter circuit?

    Filter impedance, the only thing post #1's waveforms can do.


    I was only explaining the reason of the "high current" value, a meaningless value due to a meaningless SMPS model. Even with your...
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    Closed: About Impedance matching

    Hello everyone,

    In order to have maximum power transfer, source and load impedances must be matched => results in 50% efficiency.

    On the other hand, if we would increase the Load impedance with...
  24. Closed: Re: How to make a better design for this SMPS post regulator filter circuit?

    Resonance close to 100 Hz. Therefore a low impadance is presented @ 100 Hz resulting in high current.

    Current waveform presented by LTSpice @ 100Hz is expected due to resonance of the LC filter...
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    Closed: Re: computing rated current for inductors

    Not above that threshold. At that current rating, it has already risen 30ºC above ambient. Other manufacturers give the rating current for increment of 20ºC. Others, also give you a Temperature vs...
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