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Type: Posts; User: Humusk

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  1. Closed: Re: Update .mif file without compiling (Quartus Prime) using TCL

    Yeah I come to realise that. The scripting for FPGA is unecesarilly difficult and messy. I've tried to use the GUI but it seems that the .mif files doesn't update correctly (the system don't give any...
  2. Closed: Re: Update .mif file without compiling (Quartus Prime) using TCL

    But I'm trying to learn. I don't think that I'm that far away from doing it correctly.
  3. Closed: Update .mif file without compiling (Quartus Prime) using TCL

    Hello,

    As the title states I want to pdate a .mif file without the need of compiling each time. Searching I found this intel link

    Here it says that using this I should be able to do what i...
  4. [SOLVED]Closed: Re: Is there a way to see the full contents of a flash memory with Quartus?

    I will check it, thanks.
  5. [SOLVED]Closed: Is there a way to see the full contents of a flash memory with Quartus?

    I'm working with the Development Board of the Max 10. I would like be able to see the contents of the flash without the need of having to read all the addresses (it doesn't have to be real time). Or...
  6. [SOLVED]Closed: Re: How to interpret a .RPD file to write image in FPGA Flash Memory

    Oh god, you are right, I wasn't looking at the correct place inside the VHDL, I though that I had the same number of addresses but in reality I only have 2^19 addresses.
    Thanks for the help, and...
  7. [SOLVED]Closed: Re: How to interpret a .RPD file to write image in FPGA Flash Memory

    I don't get it. For example for the UFM I have 0xFFFF addresses while using the IP core (each address can have inside 32 bits). But in the RPD file I also have 0xFFFF addresses, but each address only...
  8. [SOLVED]Closed: Re: How to interpret a .RPD file to write image in FPGA Flash Memory

    Sorry I tried to simplify the explanation and it hasn't been a good idea.

    What I'm actually trying to do is to be able to write the FPGA firmware to the FPGA flash using Ethernet. For what I have...
  9. [SOLVED]Closed: How to interpret a .RPD file to write image in FPGA Flash Memory

    I'm trying to the write the firmware of the FPGA into its flash memory with a custom core. So I need to first access the bitstream data, i've generated a .rpf file from the .pof (working with Intel's...
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    [SOLVED]Closed: Re: Convert from STD_LOGIC to integer in VHDL

    Here you can find examples with all the important VHDL conversions:
    https://www.nandland.com/vhdl/tips/tip-convert-numeric-std-logic-vector-to-integer.html
    I don't think that you can convert an...
  11. Closed: Design stops working with any non-related change in the code

    Hello,

    I've designed a simple Ethernet stack that was working correctly on a Cyclone 10 FPGA (Evaluation board). During the migration to a Max 10 (Development board) I had a lot of problems...
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    [SOLVED]Closed: Re: RGMII problem with MAX 10 Development board

    Thanks you very much for all the answers. I've found the register you mention. As you all have commented I had to first get the NDA Datasheet. I haven't try it yet, but I guess that this will solve...
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    [SOLVED]Closed: RGMII problem with MAX 10 Development board

    Hello,

    I'm trying to create my own RGMII interface for the MAX 10 Development Kit.
    Until now I was working with the Cyclone 10 LP Evaluation Kit, I sucesfully created an RGMII following this...
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