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Type: Posts; User: tiennghe27

1. ## Thread: Plot SRN and bit error rate of a rectangle pulse MATLAB?

by tiennghe27
Replies
0
Views
792

### Closed: Plot SRN and bit error rate of a rectangle pulse MATLAB?

hello everyone, i need your help
i need plot SRN and bit error rate of 1 rectangle pulse
this is code i write to plot pulse

rng default
Tpulse = 200e-3;
Fs = 1e2;
t = -1:1/Fs:1;
x =...
2. ## Thread: Autoencoders Deeplearning with parity 3 bit

by tiennghe27
Replies
0
Views
5,610

### Closed: Autoencoders Deeplearning with parity 3 bit

Can you explain to me how to train parity 3 bit with autoencoders deeplearning? . Thank you
3. ## Thread: cadence simulation problem (obtain desired timeframe))

by tiennghe27
Replies
5
Views
749

### Closed: Re: cadence simulation problem (obtain desired timeframe))

how much value strobe i can set?. this is first time i hear it. thank you
4. ## Thread: cadence simulation problem (obtain desired timeframe))

by tiennghe27
Replies
5
Views
749

### Closed: Re: cadence simulation problem (obtain desired timeframe))

Can you say more clearly. i dont understand strobe period, how can i do it
5. ## Thread: cadence simulation problem (obtain desired timeframe))

by tiennghe27
Replies
5
Views
749

### Closed: cadence simulation problem (obtain desired timeframe))

HI
I'm trying to simulate a circuit. I want to do transient simulation with a time 1s and 2s
but if time is 1s, it have enough pulse i want.
and if time is 2s, it havenot enough pulse i want.
I...
6. ## Thread: change width pulse when simulate problem

by tiennghe27
Replies
3
Views
477

### [SOLVED]Closed: Re: change width pulse when simulate problem

i simulate a pulse, but it is lost some pulse when simulate. can you tell me why?
7. ## Thread: change width pulse when simulate problem

by tiennghe27
Replies
3
Views
477

### [SOLVED]Closed: change width pulse when simulate problem

hi everyone, can you help me? i write this code, a pulse with period 300ms. then it delay 200ms. but when i measure, width pulse change, i got 0.001ms and 0.0001ns

// VerilogA for baitap,...
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