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  1. Closed: Re: Has anybody tried to run Keras or "Tensor flow" on FPGAs ?

    Hello,

    I found this project:

    https://opencores.org/projects/keras_to_fpga

    , but this doesn't look to be finished/completed, and rather is only runtime for running ANN from Keras not tool for...
  2. Closed: Has anybody tried to run Keras or "Tensor flow" on FPGAs ?

    Hello,

    as in title "Has anybody tried to run Keras or "Tensor flow" frameworks on FPGAs. I don't ask for runing trained ANN on FPGAs, but I rather asking about running neural networks in training...
  3. Closed: Re: Data Transfer over long twisted pair cable

    Hello,

    what about "CAN FD" (the newest CAN standard). It has max. data transfer rate close to your requirements (8Mbps). I am using "CAN FD" in my newest project based on STM32MP157A MCU and it...
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    Closed: New trends in High-End FPGAs - EEJournal arti8cle

    Hello Guys,

    I am just reading article from EEJournal titled "High-End FPGA Showdown – Part 1 A Tale of Three Cities". Here is link to this article:
    ...
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    788

    Closed: Re: Sine function generator (VHDL)

    Hello Klaus,

    I don't want to argue width your arguments - I agree with all of them, but on the contrary why not?

    What argumenst are against to use floating-point: occupation of FPGA resources...
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    Closed: Re: Sine function generator (VHDL)

    Hello,

    here is next part of this post:

    To make sine function generator in VHDL we need two components:

    ROM memory width sinus table for one quarter
    Compnent which is changing angle 10 bit...
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    Closed: Sine function generator (VHDL)

    Hello,

    I need for resolving Forward/Inverse kinematics problem (in context for robotic arm) to calculate trigonometric functions values. I am going to use in every arm joint quadrature encoders...
  8. Closed: Re: ESP32 Modbus RTU and measuring miliamp current

    Hello,

    you can choose: ACS70331

    Here is link to it :

    https://www.digikey.com/product-detail/en/allegro-microsystems-llc/ACS70331EESATR-2P5U3/620-1890-1-ND/8120690

    These sensor have...
  9. [SOLVED]Closed: Re: soft serial communication c code with explanation

    Hello,

    google is not working for you? See for example this link:

    https://www.arduino.cc/en/Reference/softwareSerial

    Regards
  10. Closed: Re: Modbus Communication require enhance stability

    Hello,

    did you declared exactly the same transmision parameters for three slaves?

    What Modbus function is your master using to get values of reading values? What memory addreses your slaves...
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    Closed: Re: VGA to HDMI conversion

    Hello,

    the cost of FPGA board is higher, but it is one time cost. After buying FPGA board you can use it for many projects. I can recommend you cheap FPGA board proper to implement such HDMI...
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    Closed: Re: VGA to HDMI conversion

    Hello,

    look how HDMI is implemented on FPGAs (it is basically VGA + TMDS coder). See for example these links:

    https://www.fpga4fun.com/HDMI.html
    ...
  13. Closed: Re: Audio IC (rec/play/spi) that does not s..

    Hello,

    maybe the Vs1053b is proper satisfy your expectations. Here is link to datasheet:

    https://www.sparkfun.com/datasheets/Components/SMD/vs1053.pdf?_ga=1.42121829.1331969817.1458997049
    ...
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    [SOLVED]Closed: Re: FPGA Kit Recommendation

    Hello9,

    for example from Spartan6 family: XC6SLX75 (and above). See this document:

    https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf

    Regards
  15. Closed: Re: Issues during attemp of implementation of "Matrix multiplication" Verilog project

    Hello,

    probalby I know what is up :???: I just realize that I have to generate BRAM using "Core generator": XilinxCoreLib.blk_mem_gen_v6_1 .

    I someone could confirm/deny I would appreciate...
  16. Closed: Issues during attemp of implementation of "Matrix multiplication" Verilog project

    Hello,

    I am trying to implement Verilog (actually: mixed VHDL and Verilog) project for matrix multiplication from this WWW page:
    ...
  17. [SOLVED]Closed: Re: Request for clarification: multiplication and hardware multipliers blocks

    Hello,

    what atribute I should use to literally inform synthesis software that multiplication have to be run on DSP block?

    Regards
  18. [SOLVED]Closed: Request for clarification: multiplication and hardware multipliers blocks

    Hello everybody,

    there is one question not clear for me related to multiplication in HDL code (VHDL or Verilog) and further synthesis. Let assume that we have two integers (for example 16 bit...
  19. Closed: Re: windows programming to create hex for microcontroller

    Hello,

    you can write a program in C for microcontroller(skeleton), and Windows application - code generator (for example in C# using Visual Studio) which generates code also in C for...
  20. Closed: Re: Wifi audio hub.Multiple users will be able to listen using any earbuds or headpho

    Hello,

    nowadays each of us wanna design a SoC, me too :wink:. But I am aware that this is next to impossible to accomplish.
    Why? Because it is extremely complex task. It needs enormous knowledge...
  21. Closed: Re: TC34725 i2c color sensor not working without any error (basys3 vhdl)

    Hello,

    are you sure that this I2C addres is actually proper address:


    --The address of the TCS34725. This device has only one possible address,
    --so we won't genericize it.

    constant...
  22. Closed: Re: TC34725 i2c color sensor not working without any error (basys3 vhdl)

    Hello,

    if I have been in your position I checked first how this sensor is behaving using Arduino. It is very easy to write a skech wihch can comunicate by I2C with sensor. I assume that you are...
  23. Closed: Re: Verilog "Switch-level" of circuit description has it equivalent in VHDL?

    Hello guys,

    I am a bit confused again. Could you answer my additional questions:

    1) Software tools for designing ASICs also use Verilog?

    2) These tools can use "switch-level" descriptions...
  24. Closed: Re: Verilog "Switch-level" of circuit description has it equivalent in VHDL?

    Hello,

    I was surprised than I red about this level of abstraction in context of designing FPGAs in Verilog. This coures is a shortcut from a lectures of "Programable devices" subject in one of...
  25. Closed: Re: how to check a register value is 1 using verilog?

    Hi,

    I mean that "==" operator in case of registers is comparing them bit by bit (also "===" operator that aditionaly comparing bit by bit "x' and "z" states).

    Regards
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