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Type: Posts; User: tfwee

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    Closed: Input resistance in a pad

    Pad with input resistor is used for ESD protection. Create a more resistance path so that it will not damage the gate of the transistor.
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    Closed: post layout extraction

    Hi All,

    Does anyone know whether smartspice/hspice can take in SPF format when running simulation? I am currently using StarRCX extraction tool to generate the SPF format.
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    Closed: ubuntu

    http://www.ubuntu.com/
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    Closed: Re: short course in analog ic design (2007)

    Check out this website:

    http://www.spyrotechnology.com/

    They conduct course in IC design in Singapore.
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    Closed: Pspice to Matlab Translation

    I want to model Level 3 Model Parameters into Matlab so that System level simulation can be simulate by Matlab. Any Advise
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    Closed: Pspice to Matlab Translation

    Does anyone know how to translate MOSFET with level 3 into format used by Matlab?
  7. Closed: BSIM Model

    If I am using BSIM model for simulation. Do I need to key parameter like AD, AS, PD and PS. Does BSIM model account for these parameters in the simulation?
  8. Closed: IC fab technology

    450 mm mean the dimension of the wafer size. Currently, there are 300mm wafer size, 8 inch (200 mm Wafer size), 6 inch. The bigger the wafer, the more chip you can manufacture.
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    Closed: SMARTSPICE Help

    Any Smartspice users out there who know how to continue the simulation from the point after you have stop simulation rather than starting the simulation all over again.
  10. Closed: generate high freq. clock from a low freq. crystal

    Ring Oscillator VCO design should be sufficient for your application. Of course, a fully differential structure should improve the jitter performance.
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    Closed: which language programming is best?

    Perl is another language that u may want to consider. Very similar to C.
  12. Closed: Why does CMOS technology dominate in VLSI manufacturing?

    The following are some of the reasons that I can think of:

    1) It is cheaper then Bipolar process
    2) Better integration
    3) The world top foundry are in CMOS process. Huge capacity to drive cost...
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    Closed: how to open djvu

    You can download from www.lizardtech.com to read DJVU format.
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    Closed: Has any one done layout design

    You may find this link useful

    https://www.edaboard.com/ftopic115768.html
  15. Closed: what is the 0.18um means in the "taped out in .18um pro

    Yeah 0.18um is the channel length of the transistor. Process technology node also specified length instead of width. Althought you may draw 0.18um, u may not get effective 0.18um because when...
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    Closed: LC VCO doesn't oscillate in transient analysis

    I think you may want to check the following:

    1) have to inject impluse current at the output node of the VCO to initiate or speed up your oscillation.
    2) You may have to run a longer period to...
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    Closed: dco fom

    So that is the case, that is why my calculation has additional 30dB due to the fact of the power should be in mW. Since FOM is a calculation to compare result between each design. It does not really...
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    Closed: fom calculation

    Yes, I agree that High Q would provide good phase noise for the design of the VCO but the issue that I have here is the calculation of the FOM. As I has mentioned, the FOM figure that I get is always...
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    Closed: vco fom

    I have an issue on the calculation of FOM for VCO, I have been reading paper on comparsion of FOM but I always find that my calculation is different. Can anyone help me to identify what is the...
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    Closed: SPICE & PSPICE: accuracy?

    Should be the same, it the model that will determine the accuracy. I had tried simulating my circuit in Spice and Pspice before, there is not much different in the result.
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    Closed: whats pvt

    Stand for Process, Voltage and Temperature variation.
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    Closed: regarding phase noise analysis

    I think you have asked this question in another topic before. Hope this will help. "Before you run the PSS, maybe you would like to run a transient analysis to check how long does it take for your...
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    Closed: Re: pss analysis doesn't converge

    Before you run the PSS, maybe you would like to run a transient analysis to check how long does it take for your oscillator to start oscillating. From this, you can key in the tstab. If the same...
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    Closed: About corner simulation

    You may want to check out this post which is quite similar to your question asked:

    https://www.edaboard.com/viewtopic.php?t=134971&highlight=
  25. Closed: guidlines for integrating digital aswell as analog blocks

    Ensure the digital signal line don't cross the analog line. If needed, ensure it is properly shield with ground plane. Or else you may see spur, which is cause by your reference frequency of the PLL...
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