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  1. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear pancho_heboo,

    Thank you for your reply.


    I think I am dealing with CT type for mine does not have any OP amps or switches.
    I only use a capacitor and resistors for my DS.
    If mine is CT...
  2. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear FvM,


    Thank you for your reply.
    I tried to combine the RC transfer function and CIC filter transfer function using bilinear method.
    The result is that the group delay is not linear. But it...
  3. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear FvM,

    Thank you for your reply.



    I have never heard of this although I have been searching about SD a lot...
    If you have any documents about it, please give me.
  4. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear FvM,


    I am sorry for my late reply. I was off for two days.


    I did not mention phase delay in the thread. I just meant that the system I am talking right now is on the thread.
    Anyway,...
  5. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear FvM,

    Thank you for your reply.


    I am reading the document right now.

    Let me go back to my first question.
    So whatever the filter is used in the delta sigma modulator, the phase...
  6. [SOLVED]Closed: re: What is the Frequency Response of Delta Sigma ADC

    Dear FvM,

    Thank you for your quick reply (I really appreciate you for replying me every time...).


    1) about frequency response in datasheet
    As I wrote first, I found some datasheets...
  7. [SOLVED]Closed: What is the Frequency Response of Delta Sigma ADC

    Hello all,


    As in title, I want to know frequency response (magnitude AND phase) of delta sigma adc.
    (I know there are some but they focus only on magnitude plot...)

    I just want examples so...
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    [SOLVED]Closed: Re: Trouble with Delta Sigma ADC in FPGA

    Dear FvM,


    I found the strangeness of output waveform was due to the coupling.

    After placing my analog circuits in appropriate position, DS ADC worked well (although there is an offset...
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    [SOLVED]Closed: Re: Trouble with Delta Sigma ADC in FPGA

    Hello all,


    I tried the circuit FvM told me and I could get over the common mode range problem.
    However, I still have a problem left. The waveform is shown below.
    96300
    Blue is the input sine...
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    [SOLVED]Closed: Re: Trouble with Delta Sigma ADC in FPGA

    Dear FvM,

    Thank you for your reply.
    Sorry for my late reply.


    I will try it and report the result here.


    Best regards,
  11. Replies
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    [SOLVED]Closed: Re: Trouble with Delta Sigma ADC in FPGA

    Dear FvM,

    thank you for your reply.


    Oh, different LVDS may be the one... or maybe using LVPECL is also a solution.
    How about the delta sigma ADC IP sold below here??...
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    [SOLVED]Closed: Re: Trouble with Delta Sigma ADC in FPGA

    Dear kenambo,

    thank you for your help.

    I actually did crosscheck each stage and found out that FF is working odd.
    So as I wrote and FvM mentioned below, I am thinking that LVDS is not working...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM and phongphanp,


    Thank you two.

    I found CIC filter itself was working fine.
    But the main purpose of realizing delta sigma ADC is not still solved.
    I posted a new thread about it so...
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    [SOLVED]Closed: Trouble with Delta Sigma ADC in FPGA

    Hello all,


    I want to realize delta-sigma ADC using FPGA, where digital processing (the cic filter) is implemented in FPGA and only R and C are the analog parts.
    LVDS is used as comparator.
    The...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear phongphanp,


    thanks for your reply.
    I will try to find the paper you mentioned.

    - - - Updated - - -

    Dear FvM,
  16. Replies
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear phongphang,


    Thanks for your reply.


    Can you tell me what "stobing signal" is??
    I searched it on google but could not find any information of it.

    Plus, I really want to read the...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear anddrival,

    thanks for your reply.

    I read through the CIC filter and I still don't get the reason why my design does not work...

    The decimator (and therefore integrator too) works as I...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM,

    Thank you for reply.


    It seems to me that there is no problem with the design too...
    I added "signed" so that compiler knew that 2's complement was used but the result did not...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM,

    Thanks for your reply.

    So the point is simulation is simulation and real is real??

    The code is below (sorry but I do not know how to summarize the code...)


    LIBRARY IEEE;
  20. Replies
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM,

    Is the one below is what you have mentioned?
    http://read.pudn.com/downloads163/ebook/744947/123.pdf
    I will read through it.

    But what I am facing right now is,
    Simulation: works...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear phongphanp,

    Thanks for your reply.

    I am pretty new to FPGA and I do not know what the memory mean in FPGA...
    Can you give me some information or documents about the memory you mentioned...
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM,

    thanks for your reply.

    I will read it.
    The document I read is below. It gave me good ideas about CIC filter but never mentioned about modular arithemetic....
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    [SOLVED]Closed: Re: Overflow of integrator in CIC filter

    Dear FvM,

    Thank you for quick reply.

    I did not (and still do not) know about modular arithmetic but I found that it works fine in vhdl (ModelSim) too.
    I thought the overflow could be ignored...
  24. Closed: Re: Having Trouble With Designing IIR Filter on Frequency Transformation

    I solved this problem by myself.
    I was designing the filter by maple and changing digits in maple helped me.
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    [SOLVED]Closed: Overflow of integrator in CIC filter

    Hello all,

    I am trying to make CIC filter using VHDL and will implement it on FPGA.
    I could design a CIC filter with the output from comb part does not overflow, but it DOES overflow in...
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