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Type: Posts; User: sharas

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  1. Closed: Re: Configurable delay, constant with respect to voltage and temperature

    Hi,

    Sorry. I was talking about an asychronous system. My intent is to be able to create a delay difference between 2 signals at a range between 0-250ps, with a 10 ps resolution. I have a...
  2. Closed: Configurable delay, constant with respect to voltage and temperature

    Hi,

    I am trying to design a configurable delay cell, where the delay is not a finction of the supply voltage and the temperature. It can be influenced bt the process. It needs to be low power...
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    Closed: Extracting effective mobility in hspice

    Hi,
    I am trying to find out what is the effective mobility my model has for a mosfet device in different temperatures.
    I tried
    .print ueff_n=par('lx132(xcirc0.xI50.m7)')

    But this...
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    Closed: Re: pre emphasis with voltage mode driver

    Thanks dick_freebird.

    But doesn't that chnge the output impedance during operation (a thing that I would like to avoid in order to prevent reflection from the line)?

    Thanks,

    ...
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    Closed: pre emphasis with voltage mode driver

    Hi,

    I want to implement a "pre-emphasis" feature in my voltage mode driver, but I can't see, to do so without violating the output impedance requirement. Does anyone have an idea?

    ...
  6. Closed: Re: linear system with a zero in the transfer function

    Thanks guys for the replies.

    I understand Zorro's reply: That means that for a pure sinus casuality is indeed vilolated?

    LvW, can you please elaborate hoe this solves casuality in the time...
  7. Closed: linear system with a zero in the transfer function

    Hi,

    If I have a linear system with a zero in it's tranfer function. This mean that the phase of the output will precede the phase of the input.

    How is this possible ??

    Thanks,
    ...
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    Closed: site:edaboard.com pre-emphasis

    Hi,

    If anyone can point me to material regarding pre-emphasis circuits for high speed serial links, I would be grateful.

    Thanks,

    Sharas
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    Closed: Re: Intuitive explanation for gmb

    Thanks sutapanaki!

    This was a great explenation.
  10. Replies
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    1,268

    Closed: Re: Intuitive explanation for gmb

    Thanks, but outside the math, what's the physical explanation for this current source?
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    1,268

    Closed: idsat square law prove

    I am having trouble understanding how, in the presesnce of body effect, the resistance looking into the source of a mosfet is reduced.
    Why is body effect modeled by a current source between the...
  12. Closed: Strange results when simulating circuit at ss cold corner

    Hi,

    I am witnessing some weird effects in my circuit (part of the circuit speeds up more than the other) when simulating at ss at 0 degrees. (65nm process)

    Is anyone familiar with this...
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    Closed: Re: 65nm utilization

    maximum 67% cell row utilization using Magma, but it depends on your design.
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    Closed: Checking power rail continuity

    Hi,

    Does anybody know how can I check that I don't have any "holes" in my power rail in Magma?
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    1,283

    Closed: Re: Antenna fillers

    Thanks.

    In my company the methodolgy is indeed to place these spare antenna cells.
  16. Replies
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    Closed: Why do we insert antenna fillers into a chip?

    Hi,

    Why do we insert antenna fillers into the chip? I'm talking about cells that are left unconnected, not cells that are inserted to fix specific antenna violations that are reported by the...
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    Closed: Re: electronics fundamentals

    What's the difference between the 4'th and 5'th edition ?

    Which is better and why?
  18. Closed: link library target library

    Thanks shankarmit,
    I have this book, and I don't understand his explenation. I was hoping to get a clearer one at the forum.
  19. Closed: target library link library

    What's the difference between the target library to the link library in Synopsys DC setup?
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    Closed: Synthesis & Backend learning materials

    Hi,

    Can anybody recommend a book/s or any other reaource for learning the backend flow of the design? i.e., synthesis, placement, primetime etc. ?


    Thanks,


    Sharas
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    Closed: Verification of the integration of an IP

    Hi,

    I want to run a test on my chip, and make sure that the IP I bought is integrated according to the vendor's specifications.
    I added checks for each pin according to the behaviour it...
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    Closed: Boundary Optimization

    Hi,

    Can anyone please explain what "boundary optimization" means? It is performered by the Encounter RTL compiler of Cadence.

    Thanks,

    Sharas
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    Closed: Re: Engineering Job interview advice

    Hi,

    What kind of test? You should be more specific. In generall, you should expect simple technical questions.
    You will be asked questions regarding your current job - they will want to...
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    Closed: Re: Diode breakdown

    Thanks Vicky for your crystal clear explenation. I finally understand!!
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    Closed: Re: Diode breakdown

    Thanks, but I still don't understand:
    1) Why is heat destructive?
    2) What does it mean "destructive" ? The diode will act like a "short" or "open" ?
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