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AXI4 stream bus and arbitration

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filip.amator

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Hi!

In my design I want to share an access from four AXIS master to one AXIS slave. I have generated AXI4-Stream Interconnect IP in Vivado with four slave interfaces and one master interface, with 8bit bus and TLAST signal support. I choose Round-Robin arbitration and ticked "Arbitrate on LAST transfer" but it seems that interconnect IP does not make any arbitration. The slave receives stream with data mixed from two masters.

Please take a look at the simulation. The first master at S00 ports of the interconnect IP sens 8 bytes A3, A4,..,AA. In the middle of that transaction second master (S01 ports) sends also stream of eight bytes: 03, 04,..,0A. The slave at M00 port receives stream with mixed values from both streams. I would expect that interconnect IP will wait until first master ends its data transmission and then will assert TREADY signal for second master. Did I misunderstand something? Do I need to add kind of external bus arbiter to juggle TVALID and TREADY signals?



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