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How does Foundry provide different Process Models?

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Wyre

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I'm aware that the Foundry provides the different models - ss, ff, tt etc - which will be used to characterize a standard cell library and extract the .libs. And we use OCV's, which basically say that a single type of cell can vary across a die which in-turn causes variation in its delay.

I'm curious to know HOW does the foundry analyze these models and categorize them as given above? and for OCV's, how are they able to determine the probability i.e. percentage variation of a cell?
 

They spend a lot of money bringing up and analyzing their process. They know how good and how bad the transistors (and wires) can be. These days there is a lot more than BC and WC corners, it is not uncommon to see 10+ process corners when you combine wire variation with transistor variation.
 
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