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pic24fj128ga010 pin high low problem newbie please help

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i am new to pic24fj128ga010 and using MPLAB C30 Compiler for its programming...

I write a simple code to toggle the PORTA and PORTB pins high and Low..

But that doesn't works with a timer

Pls help me..

Here is my code

Code:
//Crystal Oscillator Connected is of 32MHz

#include<p24fj128ga010.h>

#define DELAY 15625

int main()
{
	TRISA = 0;				//PORT-A Output Port
	TRISB = 0;				//PORT-B POTPUT Port
	PORTA = 0xFF;			
	AD1PCFG = 0xFFFF;		//PORT-B as Digital Input Output Pin
	PORTB = 0xFF;
	
	//Timer Operation
	//Timer-1 Control Register
	T1CON = 0B1000000000110000;		//T1CON = 0x8030
	// TMR1 on, prescaler 1:256 Tclk/2
		
	//Now we Will Toggles the LED's Connected at PORTB and PORTA
	//with a Delay of about 250 msec
	
	while(1)
	{
		TMR1 = 0;
		PORTA = 0x00FF;
		PORTB = 0x00FF;
		while(TMR1 < DELAY)
		{
			//Wait Here
		}
		
		TMR1 = 0;
		PORTA = 0x0000;
		PORTB = 0x0000;
		while(TMR1 < DELAY)
		{
			//Wait Here
		}

	}
return 0;
}

Proteus Simulation
Arun.png

I am getting an error in proteus regarding clock frequency.. pls help me
 

What are your device's Configuration Register settings?

What is the intended clocking method, Internal Fast RC, Crystal or Can Oscillator?

I would recommend using a form of the following macros to set the Configuration Registers from within your code:

Code:
_CONFIG1( JTAGEN_OFF & GCP_OFF & GWRP_OFF & COE_OFF & ICS_PGx2 & FWDTEN_OFF & WINDIS_OFF);
_CONFIG2( IESO_OFF & FNOSC_PRIPLL & FCKSM_CSDCMD & OSCIOFNC_ON & POSCMOD_XT)

Apparently, according to the attached image, the current Configuration Register settings specify a FNOSC_FRCDIV - Fast RC Oscillator with Postscaler (FRCDIV), which does not employ the PLL and therefore cannot obtain a Fosc of 32MHz.

If a Fosc of 32MHz is required, I would recommend specifying either FNOSC_FRCPLL to utilize the internal FRC or FNOSC_PRIPLL accompanied by an external 8MHz crystal.

Code:
/*
** Only one invocation of CONFIG2 should appear in a project,
** at the top of a C source file (outside of any function).
**
** The following constants can be used to set CONFIG2.
** Multiple options may be combined, as shown:
**
** _CONFIG2( OPT1_ON & OPT2_OFF & OPT3_PLL )
**
**   Primary Oscillator Select:
**     POSCMOD_EC           EC Oscillator mode selected
**     POSCMOD_XT           XT Oscillator mode selected
**     POSCMOD_HS           HS Oscillator mode selected
**     POSCMOD_NONE         Primary oscillator disabled
**
**   Primary Oscillator Output Function:
**     OSCIOFNC_ON          OSC2/CLKO/RC15 functions as port I/O (RC15)
**     OSCIOFNC_OFF         OSC2/CLKO/RC15 functions as CLKO (FOSC/2)
**
**   Clock Switching and Monitor:
**     FCKSM_CSECME         Clock switching is enabled, Fail-Safe Clock Monitor is enabled
**     FCKSM_CSECMD         Clock switching is enabled, Fail-Safe Clock Monitor is disabled
**     FCKSM_CSDCMD         Clock switching and Fail-Safe Clock Monitor are disabled
**
**   Oscillator Select:
**     FNOSC_FRC            Fast RC Oscillator (FRC)
**     FNOSC_FRCPLL         Fast RC Oscillator with PLL module (FRCPLL)
**     FNOSC_PRI            Primary Oscillator (XT, HS, EC)
**     FNOSC_PRIPLL         Primary Oscillator with PLL module (HSPLL, ECPLL)
**     FNOSC_SOSC           Secondary Oscillator (SOSC)
**     FNOSC_LPRC           Low-Power RC Oscillator (LPRC)
**     FNOSC_FRCDIV         Fast RC Oscillator with Postscaler (FRCDIV)
**
**   Internal External Switch Over Mode:
**     IESO_OFF             IESO mode (Two-Speed Start-up) disabled
**     IESO_ON              IESO mode (Two-Speed Start-up) enabled
**
*/

#define POSCMOD_EC           0xFFFC
#define POSCMOD_XT           0xFFFD
#define POSCMOD_HS           0xFFFE
#define POSCMOD_NONE         0xFFFF

#define OSCIOFNC_ON          0xFFDF
#define OSCIOFNC_OFF         0xFFFF

#define FCKSM_CSECME         0xFF3F
#define FCKSM_CSECMD         0xFF7F
#define FCKSM_CSDCMD         0xFFBF

#define FNOSC_FRC            0xF8FF
#define FNOSC_FRCPLL         0xF9FF
#define FNOSC_PRI            0xFAFF
#define FNOSC_PRIPLL         0xFBFF
#define FNOSC_SOSC           0xFCFF
#define FNOSC_LPRC           0xFDFF
#define FNOSC_FRCDIV         0xFFFF

#define IESO_OFF             0x7FFF
#define IESO_ON              0xFFFF

BigDog
 
Thanks BigDogGuru...

That works for me....
Actually i haven't read the Datasheet and thats why not able to set the configuration bits..
Thanks for your help...
 

Can I just check, I had similar to this as my 1st ever PIC24 question, the "output" port is LATA, LATB, and reading from the port uses PORTA, B etc....

Your code
Code:
"[I]PORTA = 0x00FF;
PORTB = 0x00FF;[/I]"
I'm not sure would produce any real effects...
My version wouod be
Code:
LATA = 0x00FF;
LATB = 0x00FF;


LATches are a nice feature of the 24's because it enables us to use "LATA++" and "LATA=~LATA" etc, where PORTA=~PORTA would read the input values from PORTA (the bits that are TRIS'd 0 (output) bits would read as 1)... The "read-modify write" problem with lower-range PICs, which used to need coding around, superb MicroChip, we love the 24's!!!


Please tell me if I'm wrong, but I hope to help
Cool :)
NEAL
 

Can I just check, I had similar to this as my 1st ever PIC24 question, the "output" port is LATA, LATB, and reading from the port uses PORTA, B etc....

Your code
Code:
"[I]PORTA = 0x00FF;
PORTB = 0x00FF;[/I]"
I'm not sure would produce any real effects...
My version wouod be
Code:
LATA = 0x00FF;
LATB = 0x00FF;

To the contrary, in regards to the PIC24F family, the following code snippets:

Code:
PORTA = 0x00FF;
PORTB = 0x00FF;

And

Code:
LATA = 0x00FF;
LATB = 0x00FF;

Are in fact functionally equivalent, producing the exact same effects, as both a write to PORTX or a write to LATX actually write directly to the associated PORT Latch Register.

However, there is a significant difference in a read from PORTX versus a read from LATX. A read from a PORTX reads the values currently present on the PORT pins, while a read from LATX reads the value currently contained in the Latch Register.

As you mentioned this comes into play during a "Read-Modify-Write" operation.


LATches are a nice feature of the 24's because it enables us to use "LATA++" and "LATA=~LATA" etc, where PORTA=~PORTA would read the input values from PORTA (the bits that are TRIS'd 0 (output) bits would read as 1)... The "read-modify write" problem with lower-range PICs, which used to need coding around, superb MicroChip, we love the 24's!!!

The issue is nicely summed up in the following:

Reference: Section 12. I/O Ports with Peripheral Pin Select (PPS) - PIC24F Family Reference Manual, Subsection: 12.2.3 LAT Registers, Page: 12-4
12.2.3 LAT Registers

The LATx register associated with an I/O pin eliminates the problems that could occur with
read-modify-write instructions. A read of the LATx register returns the values held in the port
output latches instead of the values on the I/O pins. A read-modify-write operation on the LATx
register, associated with an I/O port, avoids the possibility of writing the input pin values into the
port latches. A write to the LATx register has the same effect as a write to the PORTx register.
The differences between the PORTx and LATx registers can be summarized as follows:

• A write to the PORTx register writes the data value to the port latch.

• A write to the LATx register writes the data value to the port latch.

• A read of the PORTx register reads the data value on the I/O pin.

• A read of the LATx register reads the data value held in the port latch.

Any bit and its associated data and control registers that are not valid for a particular device will
be disabled. That means the corresponding LATx and TRISx registers, and the port pin, will read
as zeros.

Please tell me if I'm wrong, but I hope to help

Half right anyway, thanks for bringing up the issue.

BigDog
 
Cool, I'm glad you put me right..... I've probably just been "steered" to the LATs because they make a nice separate entity, compartmental-ising the in and out separately in mind, but without much extra practical use but the "idea of separation"...!

Ta "as always", BDog, always a pleasure being "Guided" by genius!
NEAL
 

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