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How can I simulate this??

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Ravinder487

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Hello all,
I want my signal to propagate only in one direction.How can I simulate this behaviour.Can I break the path and place a voltage source with 0V voltage in between.Or do I need to place some buffer in between.If the solution is to use only buffer how can I model an ideal buffer in cadence Spectre?please reply if there are any alternate solutions....
Thanks&Regards,
Ravinder
 

Hi
I think placing voltage source with vdc=0 wouldn't solve your problem. Try to use vcvs from analogLib for this purpose.
 
Can anybody tell me how to fed output of DAC(charge redistribution) to comparator as the W*L of input differential pair is very high(resulting in huge parasitics).It seems to me that parasitics are detoriating performance of my ADC.
Please post your suggestions!!
 

Is it cadence or pspice?

Anyway is there a circuit diagram. Plz share it

Buffer will allow flow in one direction only. You can do it with opamp easily in pspice. For short circuit in pspice...r should be small or 0 ohm...whichever works!
 
Hi all,
I'm attaching schematic of comparator.Clk signal is given to tail current source.Because of overlap capacitances there is some coupling from Clk to Vin+(connected to DAC output).Hence there are fluctuations in DAC output.
If I place a buffer(using VCVS) output of my ADC is absolutely perfect.please give me a solution for this.
Again I'm requesting same old thing, can somebody suggest me good S&H circuit operating at 1GHz sampling frequency.
 

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