MDAC design for 10bit,1.5bit per stage100MS/s pipelined adc

mdac adc

i have decided to use telescopic opamp topology for my residue amplifier/ could anyone of you upload a tutorial on the MDAC design issues.

what are the values i need to take care of?

thank you,

mdac design

Issues will come from capacitor matching, switches, and frm opamp i.e gain , phase margin, UGB, settling and slew-rate.Plz go through some ADC paper because it will tough to get paper only in MDAC -issues

Re: MDAC design for 10bit,1.5bit per stage100MS/s pipelined

How did you design the opamp for getting a 3db bandwidth of 100MHz? Did u select the telescopic opamp for that reason? How about choosing the folded cascode opamp?
Please Help as i need to design for 20MSPS pipelined ADC in 90nm technology and 1V ?

Some of imp issues while designing MDAC are
1) it shd have High gain of OPAMP so as to reduce the gain error,
2) High GBW (and hence high SR) so that it can settle to 12 LSB in 1/2 clk period
3) Low parasitic cap at the i/p of OPAMP so as to have feed back factor =1/2 and gain of 2 , this will also cause gain error.
4) low o/p offset
5) using flip-around arch in MDAC with in unity gain feedback while sampling it shd also have a phase margin of 60 or more so that it can settle to 1/2 LSB in available time or use modified flip around arch where opamp is connected in CM while sampling.
Telescopic give all these but with reduced ICMR.
6) use bottom plate sampling in each stage
7) take care of charge injections by the switches while sample and holding by the transition of clocks.

and taking care of various parasitics/cap mismatch , offset reduction at the layout level.

regards
anil

Be careful about the output voltage swing when using telescopic cascode in MDAC.