video processing in Xilinx Virtex II pro

As a part of my project, I just want to input the video to Xilinx
Virtex II pro and display the video in the monitor. But there are some
things i haven't understood

1] i am thinking of dumping each frame of video into SDRAM so that I
can process it later. Do i need EDK to initialize it? Are there any
other ways to initialize it rather than EDK or HDL code?
2] if i use EDK, i need to write the C code for intiliazation isn't it ?
3] which one would be a better idea; write codes in System Generator
and convert to HDL or do everything in HDL. The thing is later i have
to implement neural network algorithm into it.

i am not able to start because of all sorts of confusion

You do not need the EDK to access the SDRAM, but it sure makes it easier. You can create a memory controller using the Xilinx Core Generator to create the IP for controlling the memory but you must create the SDRAM parser (if I remember it right) in order to do the initialization and configuration of the SDRAM yourself.

Just a warning that Xilinx ISE does not support V2P after version 10 (I am not sure about 11 since I never used it). You must have an older version of ISE in order to perform the job. Even MIG on version 10 does not support V2P so I guess you need to go back to ISE7 to find one that does support SDRAM on V2P.

Check out this App-note:
https://www.xilinx.com/support/documentation/application_notes/xapp549.pdf

If you have access to EDK, you can use it to create a stand alone SDRAM controller there is an app note for ISE10, I am not sure if it works with ISE7:

"AR #29732 - 10.1 EDK, MPMC v4.00.a - How do I use MPMC in a standalone processor-less system? "
**broken link removed**

Hope these helps,

Cheers,
/Farhad

thanks a lot

and one more thing, is it necessary to use SDRAM so that i can dump each frame of video. or internal buffer is just fine

Hi,
If you do not want to do any processing then internal memory is just fine. You just create a FiFo large enough to handle enough data.

I did a simple project based on capturing data from a VGA camera and showing it on a VGA screen long time ago, I had to do some tricks to get it to work but it is possible to do this rather easily.

Cheers,
/Farhad

hi farhada, i am trying on the same project. is it possible to send me the project files?
regards.
zula.

Sorry, I do not use Xilinx any more. I used to use it in my previous position.

I have done something similar but using an old inrevium Spartan 3 board. The board took the PC DVI output and split the red, green and blue onto the monitor. It was use to demonstrate a simple field sequential method but the limiting factor was the monitor, so experienced a lot of colour breakup but the image was fine. No external memory was used as the Spartan 3 had ample of RAM to support the buffering of the image.

ezi, is it possible that you send me?

My suggestion for you is to understand how the video signals work - hysnc, vsync, RGB. The other alternative is to find an example code in the internet. I'm sure there is a a lot of example code. Similar to farhada, the code is an intellectual property of my previous company.

i would like to ask what is the signal blocks to add in simulink design??

so that it can be converted to hdl (via Simulink HDL Coder), and then put into the fpga with ethernet camera.

I am doing real time video using FPGA with ethernet camera.