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Transconductance stage driving small resistive load

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calculus_cuthbert

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Hi,

I need help in designing a transconductance stage. The problem I am facing is that the load of the transconductance stage is very small ~ 20 ohms and i need to drive it with current ~ 50mA.

A transconductance stage has high output impedance so how do i drive a small load without loading it???

Also coud someone point me to circuit topologies??

I need some advice really fast..

Pls help

Added after 2 minutes:

Just to add to my previous post.

So basically I need to design a current source (transconductance stage) and must be linear across the input common voltage range...
 

OTA has large output impedance.. so then do you suggest i design a buffer as an output stage to drive the load.. but then the buffer needs to swing rail to rail because the current needed is 50mA and the load is 20 ~50ohms.. which means the output swing is +/- 2.5 V
 

The buffer can be an additional high impedance stage that doesn't have to provide gain just enough current, so the loading is not really an issue. Now if your output impedance changes your overall gain will change because the last stage's gain is mainly determined by the load... but if the load is fixed then there's no problem.

diemilio
 

When you say buffer is high impedance i don't follow.. a buffer has high input impedance and low output impedance so that it can drive low resistive loads.. my question was to realize a low output impedance buffer let;s say for eg i choose a source follower topology ... the problem i think it will have is that it will not be able to swing rail to rail..

so could someone suggest what i should do??
 

Your buffer can have high output impedance, the only thing you have to keep in mind is that it is going to have a gain (so yeah, is not a buffer per se) which is going to be dependent upon your load, but if the load is fixed and the load is small, the gain is also fixed and small. So basically, all you have that stage for is to supply the current needed at your output and at the same time be able to get rail-to-rail performance.

diemilio
 

Thanks Diemilio,

I just want to confirm what I understood from your msg.

So you are saying that if the output impedance of the buffer is still high (~ in Kohms) it should be fine to drive a 20 ohm load...

I would think it would mess up the biasing of the transistors..

But I could give it a try...
 

Do you mean the bias DC voltage at the output?? That should be set by your feedback network (or your CMFB depending on what you're doing). Now if you're talking about the DC bias current of the output stage that's where you have to be careful. That output stage is usually implemented as a push-pull so you want to have the transistors very close to their off state at DC and the top PMOS transistor only on during half a cycle and then the NMOS transistor on during the other half, that way you're consuming a small amount of DC power and transferring to your load the largest amount of AC power (high efficiency).

diemilio
 

I see what you are saying but.. I am planning to use the transconductance stage in open loop and also it's a single ended output hence I don't have a CMFB circuit..

So that's why I was worried about the biasing of the transistors (DC output voltage)
 

Why can't you use a classAB buffer. All you need is some sort of buffer so that you can drive a low resistance and it not cause any stability etc issue.

thanks
 

Hi Diemilio,

I was wondering if driving the resistive load with a series series feedback amplifier would work.

If the output of the amplifier swings from +/- 2.2V the amplifier should be able to source and sink ~ 44mA (50ohm) load.

Could you please correct me if I am wrong
 

hi calculus_cuthbert,

Well, I can't really tell if it would work or not, it all depends on what you are trying to do. If by "series-series feedback amplifier" you mean a one-transistor output driving the load with a source degenerate sampling mechanism then you have to keep in mind that to be able to sink and source that amount of current you're going to have to burn quite a lot of DC power because now you have a class A output which doesn't have complementary capabilities. Now, if what you're planing is to have is a class B (or AB) output I don't see how you are going to implement the current sampling because you would need to have two feedback paths (one for the NMOS and one for the PMOS) because in this kind of stage one of the transistors is off during half of the signal cycle; additionally you won't be able to have rail-to-rail performance because now you need to somehow sense the current through the source of the transistors thus not allowing you to connect them directly to vdd/vss, so then there would be no point of avoiding a source follower output stage (which in the first place was avoided cause it didn't give rail-to-rail output).

Why don't you just use the standard inverter output stage (figure attached)?? Your error amps don't need to be that complex, as long as the properly set the right DC output voltage.

diemilio
 

Hi Diemilio,

thank you so much for your inputs... But I am a little confused... I have attached a figure..

This is a series-shunt amplifier (non-inverting amplifier). The Gm stage is a two stage opamp and then it is connected to a buffer to drive the 50 ohm load.

I could still use this to source and sink ~44mA right?

Because if the output at the buffer can swing +/- 2.2V then it can source and sink ~44mA because the load is 50 ohms.

Could you please correct me if i am wrong.

The reason why I am confused is because i can use both a series-series amplifier and a series-shunt amplifier to source -sink current so are they the same??

Thank you

Added after 49 seconds:

sorry forgot to attach the figure
 

Yes, you're right... if your buffer can go +/- 2.2 V you don't need anything else. Just be very very careful with stability!! Now that you have three stages inside your feedback loop (2 for the OTA, 1 for the buffer) you have to make sure that you have enough phase margin to guarantee stability!! This is usually not a problem if the buffer has low gain (which is usually the case due to loading) but still, it could be a serious issue.

Now when you say "The reason why I am confused is because i can use both a series-series amplifier and a series-shunt amplifier to source -sink current so are they the same?? " confuses me a little bit. I don't quite understand what you mean by "i can use both a series-series amplifier and a series-shunt amplifier" do you mean that you can add additional circuitry to do the current sampling? or do you mean that the buffer can be implemented in those two different ways??

diemilio
 
The figure I attached earlier was a series shunt amplifier (non-inverting amplifier) which means the sampling is voltage and not a series-series feedback . But I can still use it to source/sink current.

So hence even though I need to drive the load with a current, I am using a voltage sampling circuit to do the same.

That's why I said I am confused with the feedback configuration. I thought to drive current I would have to use a series-series feedback, but here I can do the same using series-shunt feedback.

So how are they different.

Thanks
 

Hi Diemilio,

Sorry to bother you again. I took a stab at the circuit you sent me. I had a question regarding it. So when you suggested that I use it as an output stage, you meant that my first stage would be an OTA and the next stage is the output stage you sent me right??

Also I need to have negative feedback around this whole circuit consisting of the OTA + output stage.. Is that right?

Thank you.
 

calculus_cuthbert said:
...when you suggested that I use it as an output stage, you meant that my first stage would be an OTA and the next stage is the output stage you sent me right?? .

Yeap

calculus_cuthbert said:
Also I need to have negative feedback around this whole circuit consisting of the OTA + output stage.. Is that right? .

Yes

calculus_cuthbert said:
Thank you.

Not a problem, I hope this info was helpful for you.

Regards,

diemilio
 

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