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Help explain FPGA IP vs ASIC IP cores

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kolla

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asic ip

Can some kind soul explain the differences between ASIC & FPGA IPs for me?
Is it possible to build an SOC using both FPGA & ASIC IP cores?
If so what tool facilitates that?

Any help or links to more reading is highly appreciated..
 

difference asic soc fpga

kolla said:
Can some kind soul explain the differences between ASIC & FPGA IPs for me?
Click to expand...

ASiC IPs are IP designs targeted for integration in ASIC designs.

Where as FPGA IPs are targeted for FPGA's.
kolla said:
Is it possible to build an SOC using both FPGA & ASIC IP cores?
If so what tool facilitates that?
Click to expand...

Yes
For FPGA Integration any tool supporting your FPGA family will also support this.
 

    K

    kolla

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explain about fpga

Is it possible to build an SOC using both FPGA & ASIC IP cores?
Click to expand...
I hope build doesn't mean physically manufacture the chips *together*.

For FPGA Integration any tool supporting your FPGA family will also support this.
Click to expand...
Which means instantiate the finished ASIC chip before FPGA 'Place & Route', right?
 

    K

    kolla

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cop02ia said:
Is it possible to build an SOC using both FPGA & ASIC IP cores?
Click to expand...
I hope build doesn't mean physically manufacture the chips *together*.
Click to expand...

I meant design an SOC :D

Thanks guys for your feedback.
 

I think you can use the IP verilog code. But I feel that the logic synthesis would differ from each other.

I'm sure that you can not use the Hard macros, but you can use the verilog code..
 

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