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Clock Latency - which definition is correct?

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kumar_eee

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Clock Latency

I came across many definitions for clock latency...

Def 1:
The number of clock pulses required by the circuit to give out the first output.

Def 2:
The total time taken by the clock signal from the source to reach the input(clock pins) of the register.

Which one is correct?. Please share your views..
 

Clock Latency

The correct definition is Def 2. especially in the context of STA. However, you are right, sometime people do refer to Def 1 when trying to describe latency of the circuit .. I would say this is not really clock latency, but latency of the design -> how many cycles from pumping the first input do you get a meaningful output. But usually, when you refer to clock latency, it is defn 2 that we are talking about.
 

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    kumar_eee

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