Designing my own Test Fixture for PA

Hi,

I am designing a Test Fixture in order to get load pull data of a packaged 40W power transistor.

I want to combine Test Fixture and Bias Tee at the same time in the same device, like that I will obtain a biasing circuit close to the device to improve the stability.

My packaged transistor has 1 millimeter width lead frame(or pad if u want), do I have to design TF on PCB with 1 millimeter width microstrip line ?

Yes, it will make things easier if the linewidth is about 1 mm and Z0=50 ohms for that 1 mm line. You can choose the material and thickness to achieve this. Of course it does not have to be but use some common sense when choosing your substrate. For instance you would probably not use TMM10i (Er=10) to hold a wide flanged power transistor.

Ok, frequency center is about 2GHz, if I use a Er=3.5 substrate,50 ohm microstrip line is about 1 mm width, but it will be diffcult to perform the TRL calibration due to low width.
It will be hazardous to put something like "silver rubber" under microstrip lines to make the THRU measurement, and the LINE measurement too...

If I want make it easier by using larger microstrip line and then reducing Z0, Does the calibration will be accurate and possible ?

thank you

joe

I assume you have a split block test fixture. I'm not sure what problem you will have. THRU is zero length so you just butt the fixture halves together. LINE will be about 22 mm long so you just drop it between the fixtures (mounted on a metal block of course). The SHORT is just a metal block that extends above the microstrip so you get a good termination. You can use Indium foil to improve ground contact between blocks and when measuring the SHORT.

You don't have to use a 50 ohm LINE, but the transmission lines must taper to the LINE width or else you will have discontinuities at the reference planes and that will screw up your calibration. The accuracy of the TRL calibration depends on you knowing the exact Z0 of the line.

You don't have to make the width of the microstrip line to be 50 Ohms all the way to the device collector or drain tab. All you have to do is to design a test fixture with 3 sections; the input, the device and the output. The bias circuitry is one input and output sections. Put the 3 sections together (make sure the ground planes of the 3 sections are soldered together using coper tap or solder wicks). Then tune the output and the input (with a narrowband LC network) until you get the perfomance and then carefully split the test fixture and look back into the input and output section with a network analyser.

If you can't get closer to the device output tab (because of the extra microstrip line), you can use the simulation tools such as AWR or ADS to do the transformation.

There is a very use application noted called "high power solid state circuit design" from ultraRF. It will tell you exactly what you want to do. Just do a google search for that paper. Good Luck!

madengr & quangt,

I said that in my case, if I use a Er=3.5 substrate to do a TF :

50 ohm line = 1.1 mm width >>>>>>>>>>>> identical to the transistor lead frame (of the package)

But if I want to design a TF with larger ustrip line (in order to make the calibration easier because it's difficult to make lines contact when you have only 1.1 mm width lines) I can design for example 7 ohm TF on the same substrate as used before.

Consequently at the reference plane I will get a discontinuity between 1.1 mm lead frame end 7 ohm ustrip lines of the TF ....

I don't know if it is correct

I don't know why you say it's difficult to connect two 1.1mm traces. Here is an example of a split block fixture:

**broken link removed**

For THRU calibration you just remove the transistor, bolt the two fixture halves together, and bridge the traces with a piece of leadframe. Same for the LINE standard, just drop it in, tighten the fixture, and bridge with leadframe.

The SHORT is a little tricky since you cant solder from the end of the trace to the metal block, but you can pack Indium foil at the end of the trace to short against the block.

quangt,
That methods works well for tuning assuming you don't want to do a true, automated load pull analysis. However to look back into the fixture with the VNA still requires a well established reference plane, which you get when you do a TRL calibration. I agree that the connections do not have to be the width of the transistor leadframe (I have done pre-matching fixtures with 12 ohm LINE standards) however when mixing and matching steps at the reference planes you had better be very careful to account for the discontinuities or else you will blow all your measurements.

Sorry! I almost forgot to mention about reference plane and the TRL calibration. Anyway, if you want to make a connection of the 1.1mm microstripline to the transistor lead. What I did in the past is to cut a piece the copper track out of the basic track kit and trim to the right size and gentlely solder the two together (make sure not too much solder).

Whatever you do at the end of the day, there will be still be discontinuity and errors and you just have to justify yourself about how accurately this got to be. Why can't you use the simulation and the model to do the loadpull? So that you don't have to go through all these troubles. ;-).