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A Question about comparator design

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naalald

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What are the key points in designing a comparator? (In addition to the offset)
 

Increasing size of input pairs will reduce offset.
I think speed and power consumption will be the conflict.
 

Hi leo_o2,
Thanks for your reply. What is the tolerable value of the input capacitors? Another point; I want to know what the role of the current source in the comparator shown in the figure below is.

13_1221461341.jpg


What if it's removed? As I have tested, without the current source it's working better!
 

naalald said:
What are the key points in designing a comparator? (In addition to the offset)

Another key point is kickback noise voltage: short input pulses of volltage when clock signal is switching.
 

leo_o2 said:
Increasing size of input pairs will reduce offset.
I think speed and power consumption will be the conflict.
You have to be careful, increasing the size of the input pairs will increase the capacitance and then increase the kickback and can reduce the speed.

Concerning the current source, if you remove it, it should not work !!
The current source is needed to bias the differential pair.
 

The current source is limiting the maximum current available and therefore it affects the speed of the comparator. If you remove it, you will have a faster comparator but you won't be able to control the power consumption (that will vary quite a bit over PVT).
 

    naalald

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little-nemo said:
leo_o2 said:
Increasing size of input pairs will reduce offset.
I think speed and power consumption will be the conflict.
You have to be careful, increasing the size of the input pairs will increase the capacitance and then increase the kickback and can reduce the speed.

Concerning the current source, if you remove it, it should not work !!
The current source is needed to bias the differential pair.

Hi,
Thanks for your reply. In fact without the current source, the biasing can be done with the input common mode voltage of the previous stage (In this case the sources of the PMOS transistors are directly connected to VDD).
But I think JoannesPaulus is right. As he said, without the current source the comparator is faster but there is no control on power consumption, and the important point, the variation over PVT is much more.
 

naalald said:
Hi leo_o2,
Thanks for your reply. What is the tolerable value of the input capacitors? Another point; I want to know what the role of the current source in the comparator shown in the figure below is.

13_1221461341.jpg


What if it's removed? As I have tested, without the current source it's working better!
Check your current without the biasing current source. I bet it's higher than when you do use it. Hence it's faster...
 

Hi,

I didn't understood what you meant with removing the current source. JoannesPaulus is of course right.
If the variation over PVT is a critical point in your design, I suggest you to bias your comparator with a PTAT current source to reduce the drift over Temperature.
 

hey,

the important function of the current source in your schematic is being a pull-up current source, if you will remove it, your comparator's performance on the high voltage side will have a higher delay..
its impact on the power consumption will of course be higher, it is because your transistors will consume more current for biasing..
 

lsimeon said:
hey,

the important function of the current source in your schematic is being a pull-up current source, if you will remove it, your comparator's performance on the high voltage side will have a higher delay..
its impact on the power consumption will of course be higher, it is because your transistors will consume more current for biasing..

Hi,
Thanks for your reply. Could you please explain about the sentence you said: "your comparator performance on the high voltage side will have a higher delay"?
Thanks.
 

naalald said:
What are the key points in designing a comparator? (In addition to the offset)

You should not remove the current source, because current source limit the current of circuit, and this is a very important performance.

And the other performance is high speed with limited current.

Besides, the phase noise of it is alse consided.

The key points are offset, current consummation, speed (resolution) and phase noise.
 

jecyhale said:
naalald said:
What are the key points in designing a comparator? (In addition to the offset)

You should not remove the current source, because current source limit the current of circuit, and this is a very important performance.

And the other performance is high speed with limited current.

Besides, the phase noise of it is alse consided.

The key points are offset, current consummation, speed (resolution) and phase noise.

Hi jecyhale,
Thanks for your reply.
Do you mean removing the current source leads to higher speed and better phase noise of the comparator? Could you please explain more about it?
Thanks.
 

Could you please explain about the sentence you said: "your comparator performance on the high voltage side will have a higher delay"?

im referring here the positive voltage trail or the rising edge of the comparator's voltage curve.. if you are going to remove that current source and you are going to plot its voltage with respect to time you will notice that the slope of its rising edge will becomes smaller. it means that there will be a higher time interval for the comparator to reach the maximum voltage from its lowest voltage..
 

lsimeon said:
Could you please explain about the sentence you said: "your comparator performance on the high voltage side will have a higher delay"?

im referring here the positive voltage trail or the rising edge of the comparator's voltage curve.. if you are going to remove that current source and you are going to plot its voltage with respect to time you will notice that the slope of its rising edge will becomes smaller. it means that there will be a higher time interval for the comparator to reach the maximum voltage from its lowest voltage..

Thanks. But why? Could you give your reason for that?
 

Welcome!

No, I think the current source should NOT removed. But you can use larger current. Usually, larger current leads to higher speed and better phase noise.

And you can increase the current by current mirror.

You know, not all the performance is the kep point in you application.
 

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