Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

poles of NMOS differential pair with active PMOS load

Status
Not open for further replies.
K

kavitha_rapolu

Junior Member level 3
Joined
Jan 4, 2008
Messages
26
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,460
How many poles does the NMOS differential pair with active PMOS load have ?

Rasavi book (page 191) equation 6.74 , says that it has two poles , mirror pole and output pole. What about the pole near the tail current source node ? Does it exist ?

Also how many poles does the (fully differential pair in fig6.29a) have ? and where are they ?

Thanks in advance
 

The pole near the tail doesnt exist because the +ve and -ve current adds up at the tail and makes it a virtual ground for AC, hence there is no pole at tail current source. Ref : willy sansen book "analog Design essentials"

Can you upload the image of 6.29a???
 

For differential excitation, the tail current point is seen as virtual ground and thus its pole doesn't affect the output. The capacitance at this point usually affects only the common mode rejection ratio at high frequencies.

Concerning the fully differential amplifier, for differential excitation, there's only one pole at the output (assuming perfect matching).
 
Thanks for your response . What about the pole at the input of the transistors . i.e. the gates of the transistors ?

The poles at the input of the transistors are considered for the common source stage right ?Why dont we consider these poles for diff amp ?
 

kavitha_rapolu said:
Thanks for your response . What about the pole at the input of the transistors . i.e. the gates of the transistors ?

The poles at the input of the transistors are considered for the common source stage right ?Why dont we consider these poles for diff amp ?
Click to expand...

The Rout for Diff amp is high(because of active current sources), if the source resistance of input (vi) where its emerging too high compared to the impedence of the Rout than you have to consider input poles..

Ref : Willy sansen "Analog Design essentials"
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top