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dftadvisor s1 violation (urgent)

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gold_2007

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when u trace the clock input for S1 violation and when it end up in black box what is to be done
 

s1 violation (urgent)

what is you black box , a memory or some other analog module? If a memory , the memory can be control by clock , You may need to use
add write control, add control to add control signal .
 

    gold_2007

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Re: s1 violation (urgent)

when u trace the clock input for S1 violation and when it end up in black box what is to be done

What is S1 violation ? Is it a setup violation or what....:cry:
 

Re: s1 violation (urgent)

stormwolf said:
what is you black box , a memory or some other analog module? If a memory , the memory can be control by clock , You may need to use
add write control, add control to add control signal .

It is analog module what should i do now ?
 

1. you can change you black box behaiver model , i think you analog model has some signal effect by clock , so dft tools think those signal is a register.
2. force analog output pin to X, mask those signal ,
dft tools will generate pattern ignore those analog output pin
3. you can report black box to see does those analog module is black box , if don't , force those black box to black box.
 

    gold_2007

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how will u force a black box to black box?
can u explain it in detail please?
 

    gold_2007

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add black box -core corex -pin pin1 X,
or
add pin constraint /top/core/../pin CX
 

    gold_2007

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stormwolf said:
add black box -core corex -pin pin1 X,
or
add pin constraint /top/core/../pin CX

in my postscan netlist i ve pad in which the inout pin is connected to a primary constraint TSTCLK with offset 0 . but in dftinsight i am seeing that TSTCLK is set to 'X'. why is so ?
the output from the pad is going to black box . what changes are to be made ?
 

The TSTCLK is connect to inout pin of black box?
If so , default dft tools auto constraint all output pin of black box to X.
And as you said , i think the black box maybe a PLL,
so the behaiver model may need modify.
 

    gold_2007

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stormwolf said:
The TSTCLK is connect to inout pin of black box?
If so , default dft tools auto constraint all output pin of black box to X.
And as you said , i think the black box maybe a PLL,
so the behaiver model may need modify.

no the inout pin is connected to pad output of which is connected to the black box .
inout pin is TSTCLK which in dftinsight is showing as 'X' so the output of the pad is also 'X' now . how can i change it some other ? do i have to edit the netlist .
can u explain in detail how to modify behavior model ?

THANKS IN ADVANCE
 

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