What is TCL, shell scripting, heat and mock guidinity in relation to VLSI

can anybody tell what is
!)tcl
2)shell scripting
3)heat
4)mock guidinity

what are all these
does these related to VLSI

Presently i am doing internship in Synplicity in india ..i had done a diploma course in vlsi ..our manager had said i will explain these in next month.... my interest is only VLSI


somebody plz help me

vlsi help

TCL is a scripting language.
Shell is an OS(Linux/Unix) concept and using some commands understood by the OS we can write some scripts. This is shell scripting.

The other two terms I am not sure about.

Scripts are like programs that are executed one line at a time. Unlike the programs written in C and other similar languages which are executed by a compiler. Where as all scripting languages have interpreters. Compilers and interpreters are programs that act as an interface between the program we write and the operating system.

Shell and TCL scripts are used to run some VLSI tools. So knowledge of them is quite essential to get into the VLSI field.

set_attribute tcl

thanks prasad and any more information guys

Added after 1 hours 9 minutes:

is my field is verification engineer

adder32: in vhdl

u hav to perfect with these stuff.... vry helpful in automation of verification work !

external_delay tcl

Hi,i heard only first two terms u specified.A vlsi engineer should know them as far as iam is concerned.
scripts allows you to write list of commands in a single file.
scripts are used when we need to execute commands repetitively.
we are sourcing all cshrc files for setting environment that is a script where set of commands are written.
tcl is supported by most of the tools xilinx,cadence etc,and we write scripts before doing synthesis so that we write all constraints and write up files in one script.
iam attaching an example script in tcl which i used for synthesis in cadence.

example shows we r writing commands which sets paths where to get vhdl file,library files,clocking issues, asking to report about timing,and write netlist files in .vhd and .v extension.

this can be done by executing step by step or writing in a script.
we almost perform this operations every time we do synthesis in RTL compiler,only change is .vhd file for which we r working.



i hope this helps u and dont forget to press help button.



set_attribute information_level 9
set_attr hdl_search_path ~/vhdldesigns/
set_attr lib_search_path ~/rc61/library /
set_attribute library {typical.lib tpz973gtc.lib} /
read_hdl -vhdl adder32.vhdl #{mipssc.vhdl adder32.vhdl alu.vhdl Datapath.vhdl extender.vhdl instrfetch.vhdl mux32.vhdl #mux5.vhdl opexec.vhdl register32.vhdl registerfile.vhdl scontrol.vhd memory.vhdl}
elaborate mipssc
set_attribute allow_sharing_subdesign true [find /designs* -subdesign *]
define_clock -name clk -period 5000
set clk [define_clock -p 5000 [find /des* -port ports_in/CLK]]
external_delay -input 100 -clock $clk [find /des* -port ports_in/*]
external_delay -output 100 -clock $clk [find /des* -port ports_out/*]
set cap [get_attr load [find [find /lib* -libcell PDIDGZ] -libpin PAD]]
set_attr clock_network_late_latency 150 clk
report timing
#retime -min_delay mat
synthesize -to_mapped -effort high
write -m > mips_synth.v
write -m > mips_synth.vhdl
write_sdc > mips_sdc.sdc
#write_encounter design -basename counter_enc -lef {../library/all.lef ../library/tpz973g_6lm.lef ../library/tsmc18_6lm_tech.lef}


bye.

vlsi help

hi ,

i also have idea about first two terms .... having no knowledge about last two....

If you want to work in the verification side then u will have to learn sripting as well...

just a comment ....why dont u try learning synthesis concept there ... they are very good in synthesis and synthesis engineers are less then verification engineers .... and u have got to do internship there u shud never miss synthesi

Re: vlsi help

hai guys thanks a lot for your valuable information...
u helped me a lot ..
i clicked HELPED for all of u guys......

thanks keep intouch

need any help jucst contact me

vlsi help

Hi,

you will come across scripting,if you r into VLSI.
so whatever it be design,verification,synthesis or dft.
learn scripting.
try to learn whatever u get chance into. u had a nice break at synplicity.

regards
Manmohan