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The power down mode in mixed signal circuit

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batistuta

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Hi,
everyone, in mixed signal circuit there are have power down mode. i check it out in a mixed signal circuit, the power down mode in digital circuit part power mode control the clock generator and the output of data, and in analog circuit part power mode control the DC bias circuit, does it always use in the upper mode? or others?
Thanks!
batistuta
 

Re: the power down mode

The fundmental idea of power down is to attain zero power consumption. So in digital domain we use a power down signal to make logic element stay in logic high or low ( current is zero at this time). In analog domain tie PMOS bias or NMOS bias node to power or ground can shut down the bias current path.
 

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    batistuta

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Re: the power down mode

batistuta said:
Hi,
everyone, in mixed signal circuit there are have power down mode. i check it out in a mixed signal circuit, the power down mode in digital circuit part power mode control the clock generator and the output of data, and in analog circuit part power mode control the DC bias circuit, does it always use in the upper mode? or others?
Thanks!
batistuta
Click to expand...

What is upper mode??
 

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