Spectral limiting for input signal in sigma delta ADC

sigma-delta input

I know that the advantage of sigma delta ADC is the oversampling which reduce the requirements for the antialiasing filter, and moves the sampling noise to higher frequencies. As I read, the decimating filter attenuates the signals higher than Fs/2.

I use an sigma delta ADC (in PC soundcard), with the final sampling frequency of 8kHz. The useful spectrum of the input signal is 0-3kHz, but it may contain equal powerfull signals with frequency higher than 4kHz.
Do I need to use a lowpass filter to remove them, before aplying to ADC? Or the decimation filter will attenuate them significantly. Also how those signal (f>4kHz) apear on the digital output?

You always have to bandlimit the input of an ADC with an analog filter (i.e. not a sampled filer such as switch-cap). You should build a filter to remove frequency components greater than fs/2 where fs is the sampling rate of your converter.

Thanks for the reply.
I know about spectral limiting at the Nyquist frequency, but I would like to simplify the filters, to have almost linear phase in the band. It's a 2 chanel system (I and Q), and I dont want to have big difference in the phase characteristics of the filters.
I asked because I saw a schematic for an ADC from Analog Devices, and the filters were very simple, and designed for higher frequency than audio.


https://www.analog.com/UploadedFiles/Data_Sheets/AD1870.pdf
See Figure 2, page 9

What happens if incidentaly the input signal frequency is say 50kHz? The simple RC filters at input wont attenuate enough at 50kHz. In a classical ADC, spectral aliasing would apear, and ruin the output signal. But as I read sigma delta ADC filters the higher frequencies through the decimation filter.
Please correct me if i'm wrong.

Do I need to use a lowpass filter to remove them, before aplying to ADC? Or the decimation filter will attenuate them significantly. Also how those signal (f>4kHz) apear on the digital output?

Click to expand...

Let fin be the maximal input frequency, and fs=8kHz, fclk=OSR*fs ,
if fin < fclk/2 then there is no alias will be generated before SDM.

yes, u need a simple one, cause fclk is much higher than original fs. u must restricted ur input BW before S/H of SDM.