Issues and questions about PCB routing

Hi,

I am currently routing a PIC Thermal controller and was wondering if I route the I2C lines underneath the PIC would that be an issue. It is going to be just two layers but my PCB is contrained to 2.5" to 2.5".

I have max232, I2C eePROM and I2C temperature sensor, dual FETs, oscillator and a PIC16F690. What other issues should I avoid?

Re: PCB routing

I've done this before without any problems, but, you know, it depends on how you do it... in case your pic is SMD, try to stay as far from the pins as possible, since if you get close to them (say, about 5 mils) you will have a literally difficult time aligning your chip with hand...

Re: PCB routing

eziggurat said:

... and was wondering if I route the I2C lines underneath the PIC would that be an issue. [?]

Click to expand...

That shouldn't be an issue. The currents in it are small, so I2C and PIC don't generate EMI, which could be harmful to each-other. I've, personally, routed I2C under 40-DIP and 28-SOIC pic before. However, this problem doesn't depend on the package of the PIC, as long as you can solder successfully.

Re: PCB routing

Do you think this PCB layout is correct?

I am not very sure about the via being close to the pads but I ahve check it to be approx. 5mil.

Re: PCB routing

eziggurat said:

Do you think this PCB layout is correct?

Click to expand...

It may work. Some comments:

- Don't use auto-router.
- Make the traces that connect to the crystal as short as possible. These are the only high-frequency signals on your board.
- Is U1 the PIC? Which PIC are you using? Are you sure that it's a wide 20-SOIC not the narrow one?
- Add mounting holes
- Add board name and revision and your name as text in the silk screen

Re: PCB routing

My comment are as following :

1.) X'tal to loading cap. trace. Keep on layer1 don't route to layer2 through vias.
:- Better ESD immunity as well as EMC.

2.) U1 : try to allow a better gnd to pass through on layer1. ( as well as other ic's )

3.) ic decoupling caps. Try to place them as close to ic as possible and make decoupling loop as short as possible.

4.) Connect the gnd plates together through solid copper plates on both layers instead of bits or pieces of tiny copper plates link together through vias.

5.) You may need a big decoupling cap. eg. 10uF or bigger to connect between power line and gnd.


6.) Senser circuit ( I don't which part of your circuit )
a.) differential input : the two traces should place side by side and use a relatively good gnd plate to surround them.

b.) single eend input : similar to 6a.) and try to keep away from ' clock ', ' data ' traces.

c.) Bias circuit of sensor MUST be well decoupled.


roger

PCB routing

No problem, But you make sure that the high frquency traces are routed through an guard traces and prefect impedance termination.

You can even achieve in two layer board.