Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

The ESD test and the bonding wire of package

Status
Not open for further replies.
C

chang830

Full Member level 5
Joined
Feb 11, 2006
Messages
267
Helped
14
Reputation
28
Reaction score
3
Trophy points
1,298
Activity points
3,424
Hi,
I have a question about the ESD test.

When ESD zap on one pin, the bonding wire will present itself as an inductor and act as a high impedence for ESD current.

Few paper/articles mentioned it. I wonder, the inductor of bonding wire play no role for ESD ZAP?

Pls. comments.

Thanks
 

chang830 said:
Hi,
I have a question about the ESD test.

When ESD zap on one pin, the bonding wire will present itself as an inductor and act as a high impedence for ESD current.

Few paper/articles mentioned it. I wonder, the inductor of bonding wire play no role for ESD ZAP?

Pls. comments.

Thanks
Click to expand...

You are considering your charged finger or any objects in touch with the legs of a IC. However, you should consider the chips are being wire bonded. Once the wire is in touch with the pad, even with all ESD precautions, there is still a chance that the wire is charged and makes your chip under ESD. I guess that is why people seldom to talk about the bond wire. Also, as package technology is rapidly improved, that inductance is greatly reduced such as the use of solder pump in flip-chip. So, a ESD design is still the best way to handle ESD :p

Hope it helps
Scottie
 

    C

    chang830

    Points: 2
    Helpful Answer Positive Rating
the bonding wire's inductance is just on the order of serveral nH, so the impedance looking into the chip is very small. If you consider it as high impedance, then nothing can be input to the chip and nothing can be out from the chip. Your consideration is not correct.
 

hung_wai_ming(at)hotmail.com said:
the bonding wire's inductance is just on the order of serveral nH, so the impedance looking into the chip is very small. If you consider it as high impedance, then nothing can be input to the chip and nothing can be out from the chip. Your consideration is not correct.
Click to expand...

Hi,
Thanks for the reply.

It is true that the inductance is small. But the impedence also depend on the frequency, i.e., the impedence is direct proportionally to L*freq. While the ESD current changed very quicklly, the impedence maybe large.

Pls. correct me if i am wrong.

Added after 10 seconds:

hung_wai_ming(at)hotmail.com said:
the bonding wire's inductance is just on the order of serveral nH, so the impedance looking into the chip is very small. If you consider it as high impedance, then nothing can be input to the chip and nothing can be out from the chip. Your consideration is not correct.
Click to expand...

Hi,
Thanks for the reply.

It is true that the inductance is small. But the impedence also depend on the frequency, i.e., the impedence is direct proportionally to L*freq. While the ESD current changed very quicklly, the impedence maybe large.

Pls. correct me if i am wrong.
 

pls check the ESD standard for the ESD current rise up time before you draw this so-called "guess". It is not wise to make guess without knowing actual ESD test.
 

    C

    chang830

    Points: 2
    Helpful Answer Positive Rating
The inductor of bonding wire has little effect on VDD and Vss, but do has effect on Signal Input.However, if you are desing RF circuit, you should consider the ind of bondingwire and use it as a matching device in your impendace matching network.
 

    C

    chang830

    Points: 2
    Helpful Answer Positive Rating
It can induce several nH to the input.

Then the circuit is affected by the paracitance
 

I agree on that the bonding inductance (~nH) might influence ESD test to some extent. However like very fast CDM will not be influenced because the device is charged and breakdown might happen from inside.
 

If you consider the HBM ESD Standard which has a typical stress time of 1.5ns, if we assume a time constant of 1ns which corresponds to a freq of 1GHz and then assume the Inductor has a bondwire inductance of 2nH the impedance of the inductor comes out to be 12 ohm. The HBM defines a series resistance of 1.5K through which the discharge even occurs. So 12 ohm is insignificant. Even if we consider a much smaller time constant it does not make much difference. The ESD standard that is affected is the CDM which does not have a series resistance through which the discharge happens and that is why that shows ringing and is more difficult to product with.
 

Yes, it will have more influence on MM that resistance is zero.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top