Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Interprocess communication

Status
Not open for further replies.

BAT_MAN

Member level 5
Joined
Oct 9, 2006
Messages
90
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,845
I have studied two types of inter-process communication mail box and shared memory but how operating system manages the shared memory it donot allow the two process to have same memory or interact with each other:?:
 

Hi bat_man

Shared memory between two processes is managed by the two process in active mode themselves and the os is not concerned with it It only allocates the memory.
 

    BAT_MAN

    Points: 2
    Helpful Answer Positive Rating
Yeah you are a bit right but for systems with an MMU, RTOS generally allows you to perform DMA and
interprocessor communication more efficiently by rendering related buffers
noncacheable. This is necessary to ensure that data is not being buffered locally
when other processors or DMA devices are accessing the same memory location.
Without the ability to make portions of memory noncacheable, caching must be
turned off globally (resulting in performance degradation) or buffers must be
flushed/invalidated manually.
Architectures that do not support bus snooping must disable the memory caching
that is used for interprocessor communication.
 

    BAT_MAN

    Points: 2
    Helpful Answer Positive Rating
First go through this document http://www.only4gurus.com/techlib/miscellaneous/virtual_memory_management.doc

As shown in the document all the processes use "Virtual address" only to refer to any momory location and its a job of operating system to convert the given virtual address to its corresponding physical address (or actual address in RAM). For shared momory the page table entries are adjusted in such a way that all refereces made to shared memory by any process are mapped to same area of RAM (or physical address).
 

    BAT_MAN

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top