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Design rules for tsmc 65nm and 90nm processes

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deh_fuhrer

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Hello guys,
can anyone please give me the complete list of design rules for tsmc 65nm and 90nm processes.i am using a layout tool in which dr can be edited so i want to make a btech project using these rules.please help me out.
Thanks in advance,
Bye
 

TSMC 90nm

If you use tsmc 90nm to tapeout, you can ask the foudry for the document.
 

    deh_fuhrer

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Re: TSMC 90nm

i am using the cadence generic process design kit, and i think it's adequate for layout and simulations. they have the 90nm PDK as well as the 180nm one.

As for TSMC, i am not too sure how you can request them.
 

    deh_fuhrer

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