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Verilog examples of how to implement a master/slave SPI

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bb12mpc

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Master/Slave SPI

Is there any example or source verilog for how to implement a master/slave SPI? Thanks!
 

Master/Slave SPI

i have write one but just have master mode ;because i don't need slave mode;give me some money i do for you !just a little .ok?
 

Re: Master/Slave SPI

it that SPI need Money ? We usually send it free in 8 bit mode
 
Re: Master/Slave SPI

bb12mpc said:
Is there any example or source verilog for how to implement a master/slave SPI? Thanks!
Click to expand...

Here, enjoy

(And it's free. I believe that one who ask money for help should leave this forum)
 
hey, I cant see the code now. can someone help me by reposting the code if possible.
thanks a lot!!
 

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