Looking for tutorials on System C for Spartan3 starter kit

SYSTEMC

i have FPGA spartan3 starter kit
i want to use systemc but i dont know how i bigin
please i want any book or toturial and the program which use , ...........
thanks for any help

Re: SYSTEMC

What you need is a book!!!
SystemC primer –J. Bhaskar.
I dont know whether you can synthesize ur design coded using SystemC.
Only Synopsys DC supports SystemC synthesis!!

Re: SYSTEMC

nand_gates said:

Only Synopsys DC supports SystemC synthesis!!

Click to expand...

Hi

also Cynthesizer


tnx

Re: SYSTEMC

jimjim2k said:

nand_gates said:

Only Synopsys DC supports SystemC synthesis!!

Click to expand...

Hi

also Cynthesizer


tnx

Click to expand...

It's my first time to hear that Synopsys DC supports SystemC synthesis !!! ..
Anyhow .. the best approach now for SystemC synthesis is to use that free engine called (sc2v) .. available for download for free on the internet .. this engine actually converts your SystemC to Verilog (under some guidelines for RTL coding ) .. and then you can directly synthesize the resulting Verilog code using any Verilog Synthesizer ..

This is one thing ..

The other thing is that you can use SystemC not in Hardware Description only .. Xilinx supports SystemC as a programming language I guess for their built-in processor cores .. like pico-blaze/micro-blaze .. if am not mistaken ..

Hence , you can use SystemC for complete system description .. both hardware part and software part .. and then synthesize the hardware part (if already written in RTL style ) and compile the other part to run on a processor ..

Re: SYSTEMC

Agility Compiler

SystemC Behavioral Design and Synthesis

The Agility Compiler provides behavioral design and synthesis for SystemC. It is a single solution for FPGA design and ASIC/SoC prototyping. Early TLM models can be quickly realized in working silicon yielding accurate design metrics and RTL for Physical design.


Highlights
Pure SystemC with no proprietary constraints or annotations
Automatically generates IEEE RTL VHDL & Verilog
Automatically generates FPGA netlists including Stratix II and Virtex 4
Synthesis support for multiple clock domains
Synthesis support for multiple blocks and no size limitations



Documentation
Agility Compiler Datasheet
Technology Overview



Better designs, faster

Specify, design and model in SystemC
Synthesize high-level models directly to FPGA for verification or RTL for ASIC flows using the industry’s most mature C-synthesis technology
System models in silicon earlier

Connect the Electronic System Level with Physical design flows using the Agility Compiler
Implement Transaction Level Models (TLM) described in SystemC in working silicon much earlier in the design flow. This capability is not restricted to small, single block or single clock domain designs.
Manage complexity and reduce risk

Use SystemC to develop systems using layered design and transaction level modeling techniques
Reduce error with a common language for specification through to implementation
Maintain the testbench and share code, libraries and system models with all members of the design team from specification through to implementation.
Enable the design team

Rapid architectural exploration in SystemC with the direct implementation of high-level models and complex algorithms
System verification in high density reconfigurable architectures
A common language and smooth flow to implementation
An Easy to use design environment.

Re: SYSTEMC

I'm afraid this is only a behavioral synthesis !! and not logic/physical synthesis!

Re: SYSTEMC

Can someone of Moderators control how many people "mhamini" has helped
because it seems that it is spamming all around the forums....

Information herein is to be shared with other people otherwise don't post such posts but only what you can publish here.

Please stop replying: "GIVE ME YOU MAIL etc. etc..."

regards

maXer

Re: SYSTEMC

please i want any link for down load any of this programes

Re: SYSTEMC

can anybody tell me the link to the e-book of systemC primer ... or at least tell me how to program in systemC

Re: SYSTEMC

are you going to use SystemC in RTL design or to program any processor core coming with Xilinx like Picoblaze or these things ?

Re: SYSTEMC

i make very simple program by systemc and build it
but i can't convert the cpp file to vhdl file
please any one have aprogram use to convert send to me or any one use systemcrafter please tell me how i can use it

thanks for any help

Re: SYSTEMC

alieeldin said:

i make very simple program by systemc and build it
but i can't convert the cpp file to vhdl file
please any one have aprogram use to convert send to me or any one use systemcrafter please tell me how i can use it

thanks for any help

Click to expand...

there is a program to convert your SystemC to Verilog (not VHDL) .. it's called SC2V ..
P.S. not all SystemC can be converted to HDL .. you need to write your SystemC first in an RTL fashion ..

Re: SYSTEMC

please give me the link of SC2V (note opencores site closed)
and give me in steps how i can use it
thanks

Re: SYSTEMC

alieeldin said:

please give me the link of SC2V (note opencores site closed)
and give me in steps how i can use it
thanks

Click to expand...

I checked opencores website and it's still running properly ..
you can download the sc2v complete stuff from this link :
https://www.opencores.org/cvsweb.shtml/sc2v/
and the steps are located in this file :
https://www.opencores.org/cvsweb.shtml/sc2v/sc2v.pdf

Re: SYSTEMC

omara007 said:

alieeldin said:

please give me the link of SC2V (note opencores site closed)
and give me in steps how i can use it
thanks

Click to expand...

I checked opencores website and it's still running properly ..
you can download the sc2v complete stuff from this link :
h**p://www.opencores.org/cvsweb.shtml/sc2v/
and the steps are located in this file :
h**p://www.opencores.org/cvsweb.shtml/sc2v/sc2v.pdf

Click to expand...

Hi

What did you think about the value sc2v versus v2sc?

I think v2sc is a more attractive subject.

tnx

Re: SYSTEMC

jimjim2k said:

Hi

What did you think about the value sc2v versus v2sc?

I think v2sc is a more attractive subject.

tnx

Click to expand...

I guess no one wants to go from Verilog to SystemC .. while everyone is searching for a synthesis gate for SystemC ..

Re: SYSTEMC

you can use either Cynthesizer fronm zforte design systems or DK suite from Coware..

Re: SYSTEMC

omara007 wrote

jimjim2k wrote:
I guess no one wants to go from Verilog to SystemC .. while everyone is searching for a synthesis gate for SystemC ..

Click to expand...

well, i am just about to ask v2sc.
We have some old verilog stuff to maintain,
not sure if it's a good idea to port them to systemC??

Re: SYSTEMC

not sure if it's a good idea to port them to systemC??

Click to expand...

I think it's a good idea,and I know that somebody did this before.
I think sc2v is not very good,so I always transform by myself.
I have the e-book of systemC primer,and who want it can contact me.

Re: SYSTEMC

SystemC is a good language for new projects, with a top down approach. However, if you have to mix together some existing IP blocks, you would rather try SystemVerilog. This latter is better suited for a bottom up methodology.