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Please look this oscillator...So strange problem! (uploaded)

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rockycheng

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Hello everyone,

This oscillator is used in a DC-DC conveter, to generate clock signal and compensation ramp.

The function is that, when ramp voltage goes above a certain thresh voltage, the NQ ouput of the SR latch turns from 0 to 1, discharging the capacitor.........

The problem is that the capacitor is not charged at all! All the current goes into the transistor besides it.
NQ should be 0V, but it's exactly 569mV, and just put the transistor in active region. So a stable loop is formed.

What should I do with this problem?

Thank you very much!
 

I tried the standard 555 oscillator circuit. It had the same problem: the capacitor is not charged, and all the current feeds into the transistor.

Please help me.
 

add a initial state: Make node clk is zero.
Or add a big Resistor(more than 100K) between clk and gnd
 

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    rockycheng

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Re: Please look this oscillator...So strange problem! (uploa

Pls setup the initial node voltage of capacitor is zero,then run transient analysis.If the capacitor hasn't been charged yet, oscillator circuit is not correct!
 

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    rockycheng

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Thank you guys! When I added an initial state, it could work now. But I just use the "vpwl" instance in the cadence for simulation. I know it's not a practical way for the hardware. How do you usually realize the reset function of the oscillator?
 

Connect yuour RS trigger NQ to trasistor gate through 2 input OR and use second input as reset . When you supply 1 to that input - capasitor will be fully discharged and oscillation will be stoped .
 

Thanks artem! It's a method to enter the initial state. But in this way, I have to use an extra signal to start the oscillater, and thus the whole system. I know most of the power supply should start working by itself al long as the input voltage is added. I still can't figure out how to achieve this.
 

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