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at first those are all digital design devices,
Historically it began with PLD and then CPLD which is Sum-of-product based device. it is maily for smal gate count, but FPGA has better salar architecture. it is suittable for large digital designs,
for more information please take a look at these site:
xilinx.com
altera.com
GAL = Generic Array Logic, a registered trademark of Lattice (subsidiary of AMD). GAL is a modified PAL by including macrocells. It was in the 70s considered the earliest improvement in SPLDs or programmable logic arrays (PAL, PLA and ROM) which later propelled the development of CPLD in early 80s.
Refer to any books that tell you the architectures of GAL and FPGA.
BTW, GAL uses macrocells to implement SOP or POS.
FPGA uses LUT to store arithmetic coefficients, depending on Xilinx or Altera trademark technology, the intended datapaths only perform general arithmetic computation like addition, multiplication, shifting etc.
I feel, logic corresponding to one clock domain will be implemented in Single macro cell of GAL.
But in the case of FPGA the logic will be scatterd into different CLBs (if logic is more).Even it is of one clock domain only.
All are programmable logic devices which are used for implementing digital designs.But they vary in their internal logic block structure. U can get lot of information on the net use google search engine
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