Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Help me to understand switch capacitor circuit

Status
Not open for further replies.
S

snoop835

Advanced Member level 4
Joined
Feb 7, 2005
Messages
102
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,298
Location
Penang, Malaysia
Activity points
1,371
Hi teachers out there,

I am trying to understand the principal and maths of the circuit attached in this forum. The circuit is used in a gainstage of pipelined ADC. It is said that the function of the gain stage is to obtain the residue by subtracting the sub-DAC output from the original input and route it to the next stage. Can someone explains what is the maths behind the operation of this circuit?

I appreciate any comments.

Thanks in advance.
 

you can visit

www.ti.com

www.analog.com

for some related documents.

best regards




snoop835 said:
Hi teachers out there,

I am trying to understand the principal and maths of the circuit attached in this forum. The circuit is used in a gainstage of pipelined ADC. It is said that the function of the gain stage is to obtain the residue by subtracting the sub-DAC output from the original input and route it to the next stage. Can someone explains what is the maths behind the operation of this circuit?

I appreciate any comments.

Thanks in advance.
Click to expand...
 

Your suggestion is too general. I couldn't find the documents that I want. Could you provides in more detail which document to surf?
 

hello,snoop835
the schematic is too hard to see clear, maybe seperate them into bigger files
 

    S

    snoop835

    Points: 2
    Helpful Answer Positive Rating
Hi guyz,

I have attached more bigger picture. Pls let me know if you guyz can't see the picture clearly
 

snoop835,
these r basic questions, you can get answers
in every book that explained ppln adc.

regards.
 

    S

    snoop835

    Points: 2
    Helpful Answer Positive Rating
Hello Snoop835 ,
please put a better picture !
Second don't forget to put with your schematic clocks phase, because w/o clock is not easy to understand what this circuit is doing
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top