nitishn5
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Hi,
We are designing a 12bit SAR ADC with a Capacitive DAC. The capacitor values after layout are critical as the parasitics also need to be in proportion.
We have also ensured that in layout, at all levels of the hierarchy, there is no routing or anything coming close to 10u, or above the main CapDAC capacitor array.
We are using Calibre xRC for extraction, extracting C+CC in Transistor Level.
We got the following questions while doing some experiments.
Cheers.
We are designing a 12bit SAR ADC with a Capacitive DAC. The capacitor values after layout are critical as the parasitics also need to be in proportion.
We have also ensured that in layout, at all levels of the hierarchy, there is no routing or anything coming close to 10u, or above the main CapDAC capacitor array.
We are using Calibre xRC for extraction, extracting C+CC in Transistor Level.
We got the following questions while doing some experiments.
- Is Calibre xRC accurate enough for a 12bit ADC? This requires accuracy of extraction of coupling capacitors of the order of 1/4096 ~ 0.025%
Others seem to have used Assura or StarRC for similar designs with good results.
- While extracting at different levels in the hierarchy, we are getting different values for the coupling capacitances. And it is not monotonic from lower to higher levels.
Do Rule Based extractors like Calibre xRC have some trade off between the size of the circuit and extraction accuracy?
Cheers.