[MOVED] Why FPGAs are shipped with optional microcontrollers soft cores

I am an experienced FPGA programmer. I am doing designs using Verilog and VHDL for quite some time, now.
Till today, one question bugs me a lot, and often. Why every FPGA vendor gives an option of a soft microcontroller core as well? Like Intel gives an option of ARM and NIOS, Xilinx gives an option of Microblaze etc.

The question is: If we have FPGA, we know HDL, why we need a microcotroller and for what applications?

p.s I have noticed some designs using both FPGA as well as soft microcontroller cores, at a time, but still could understand the need to use both the processing platforms at a time. e.g I saw a system implemented on Cyclone FPGA and that was using both FPGAs and micro-controller at a time.

Someone experienced, please shed some light.

Cheers

Re: Why FPGAs are shipped with optional microcontrollers soft cores

The question is: If we have FPGA, we know HDL, why we need a microcotroller and for what applications?

Click to expand...

Because it is faster to code (can be relative), verify and debug in C for the same functionality which is implemented using RTL.

Your softcore uP is always there as a verified IP. Just instiantiate, write your C code and run. Saves a great amount of time!

But applications coded in RTL will always utilize less logic, will be more cycle-accurate, but takes more development and verification time.

In the end it completely depends on the application and the expertise resource available.

This question is better suited for the FPGA forum, I guess.

Have you tried to implement the handling of the FAT file system in the raw HDL? How do you think, how difficult it would be? And how expensive to contract a FPGA designer?

Because the world is building SoCs for a decade now. You put a core in there to be the centerpiece of the system.

Hello,

because it is easier to implement comunication controlers - for example CAN, Ethernet etc. It is also easier connect with Pmod external shields (you need either soft-processor or hard-processor) with various peripherals.

Regards

The question is: If we have FPGA, we know HDL, why we need a microcotroller and for what applications?

Click to expand...

You are looking at the FPGA as the main ressource and at the SoC CPU as an accessory ressource, but you could consider the opposite. With the speed that certain functionalities can be achieved if compared to the fetch/execution of microcode in the CPU, the FPGA can actually speed up the process as a whole, that is, where you originally wrote a code which called a function executed in firmware, now you can optionally execute it in hardware with few clock cycles instead of a CPU instruction cycles.

Two points here:

1) Using a soft-core may avoid the used of an additional processor, thus saving money and space. If you need a FPGA and a small processor, you can use a soft core + logic in a single chip.

2) On a long-term bases, processors are released and discontinued every day. If you use a soft core, you avoid processor discontinuation. One can argue there is the FPGA discontinuation problem, but a) a soft core can be ported easier to a newer FPGA than a OS ported to a new core and b) FPGAs tend to have longer lifecycles.

I don't think there's any commercial project I've worked on our seen that does not have a processor (or several) on the board or in the FPGA. Control and decision is much easier in a processor. Plus you can get a Linux OS on small processors these days, which will give you a TCP stack, or pcie or other Comms drivers for free, that will just talk to just about anything.

I highly doubt you can get a TCP stack up and running in an FPGA.

TCP/IP can be done in an FPGA. It's not really that bad, but it certainly is easier and less buggy to do it in SW.

TrickyDicky said:

I don't think there's any commercial project I've worked on our seen that does not have a processor (or several) on the board or in the FPGA. Control and decision is much easier in a processor. Plus you can get a Linux OS on small processors these days, which will give you a TCP stack, or pcie or other Comms drivers for free, that will just talk to just about anything.

I highly doubt you can get a TCP stack up and running in an FPGA.

Click to expand...

Complete stack is indeed difficult, and some time impossible due to space constraint, but from Phy till MAC, its pretty normal.

I see you answered your initial question by identifying TCP stack as a useful application of softcore, isn't it?

Just consider what is the microcontroller in general - consider it as a sequential block just like specific state machine. That state machine considered as the microcontroler can be easily changed by changing the application code in let's say C language. The relative speed in changing that sequential block are sometimes faster then changing pure HDL sequential block because making changes in C language is sometimes faster then making changes in HDL language.