is DC voltage gain not an important issue to consider in LNA designing?

Common source and common emitter configurations have a source/emitter resistance and capacitance in parallel, why not include these in an LNA design also? I read from electronics-tutorials website: https://www.electronics-tutorials.ws/amplifier/amp_3.html about 1/3 of the way down the page it talks about the importance of Rs and Cs in the circuit, which is to help stability and prevent loss of voltage gain. First of all, I wasn't sure if they were talking about DC or AC voltage gain? but, if this is the reason because of DC voltage gain, then why should I not consider this quality in a 2.4 GHz LNA design? I notice a lot of people design UHF LNA's without the Rs and Cs, but rather they would use a very small transmission line and short it. I know at microwave frequencies we cannot consider the AC voltage but rather the strength of the signal using s-parameters, but why not consider DC voltage gain?

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skatefast08 said:

I notice a lot of people design UHF LNA's without the Rs and Cs, but rather they would use a very small transmission line and short it.

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would this replace the same effect as if you were to replace Rs and Cs at lower frequencies?

I'm not fully understanding your questions. Rs is necessary for DC gain, but is detrimental to AC gain - which is why it is usually bypassed by Cs at low freqs. For RF freqs, the transistor itself usually has enough Rs for the needed stability and cannot be bypassed. You should optimize your design to the desired S-parameters that your design needs. Who cares about DC gain, other than to make sure it is stable there? If you want to know this value, look at your plots of S21 at f(0)Hz, which is very far from where you will be operating.

And the source isn't shorted, per se, but grounded as close to the source as possible.

DC gain is not a performance interest because stages are
usually DC-blocked. Gain as impacts bias circuit design,
variations in gain leading to variations in operating point
and thus frequency domain performance, you probably
do care about (at least, modeling accuracy; even if you
don't aim for a specific gain you need to know what it is).

SLK001 said:

Rs is necessary for DC gain, but is detrimental to AC gain - which is why it is usually bypassed by Cs at low freqs. For RF freqs, the transistor itself usually has enough Rs for the needed stability and cannot be bypassed.

And the source isn't shorted, per se, but grounded as close to the source as possible.

Click to expand...

Here is my schematic of my 2.4 GHz LNA, using pHEMT (ATF-55143).
https://www.edaboard.com/attachment.php?attachmentid=146338&d=1524966840

So your saying it wouldn't be necessary to place an Rs and Cs into the circuit as I did in the schematic, because the transistor already provide enough resistance internally at the source for stability? My presumption is that the transistor would also provide enough capacitance internally, to provide a bypass for lower frequencies also ?

When I designed my LNA, I only used the s-parameters given in the datasheet for a bias point of Vds = 3v and Id = 30mA.

So the best bet for me, would be to place a small line at the 2 sources with a couple of vias at the end of the line? I read an Agilent Technology paper: https://www.rf-microwave.com/resources/products_attachments/5a4386e1891b2.pdf (look on pg 4) who designed a 5.1-5.3 GHz LNA and they only provided a small line with a couple of vias at the end of the line. I am thinking about doing it the same way, but want to see what you or someone else's suggestions would be, before proceeding to the manufacturing.

Here is my new PCB design: https://imgur.com/a/ciuFAM6 note: this is not the same as the schematic with the Rs and Cs.

Are you designing your LNA without any simulations? I certainly do NOT recommend it. Before simulations were perfected, designs had to be hand-calculated for gain and stability. Believe me, the calculations were horrendous, long and very much error prone, so you usually repeated them until you got the same answer twice. This could take days (complex math) with a hand held calculator.

Sometimes, a device will need the Rs/Cs combo to be unconditionally stable. If this is so, then that device probably shouldn't be used for an LNA. For most applications at RF, the source lead should be as short as possible (to ground).

Why aren't you posting your images here?

The thread title is misleading, you are actually asking about DC bias methods rather than DC gain.

I see that the source RC combination in your LNA design is undesirable because it introduces unnecessary series inductance and respective RF gain drop. Did you study the DC bias suggestions in the ATF-55143 data sheet?

If you find that convenient source DC feedback is sufficient for your LNA specification, you should at least spent two capacitors, one for each source terminal.

Without source resistor, there should be a series resistor in the drain circuit providing DC feedback to the gate according to the "passive biasing" scheme.

it depends. If your DC gain is VERY high, there is a strong likelihood that your "amplifer" will instead become an oscillator, perhaps at 20 MHz or so.