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How to use 3 3-input NAND gates for 4 outputs?

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Logic Implementation

I need to use a 74LS138 de-multiplexer and a single 74LS10 (triple three-input NAND) to implement the folowing boolean function:

F(a, b, c) = abc’ + ab’ + a’b’c

= abc’ + ab’c + ab’c’ + a’b’c

Sum of min-terms = (1, 4, 5, 6)

I just don't get how exactly to use 3 3-input NAND gates for 4 outputs.

I thought of connecting the 4 inputs to 2 seperate NAND gates, and the output from those two NAND gates to the final one. Will that work?

Can anyone help?
 

Re: Logic Implementation

Look at the first and last terms of your function. They are available complemented right from your 74138: abc'=Y5' and a'b'c=Y4'
So if you feed these to a 2-input NAND gate you get G(a,b,c)=abc'+a'b'c.
The middle term does not use c, so c can be either 0 or 1, that is, it can be either Y1' or Y5'. So you take outputs Y1' and Y5' and feed them to a 2-input NAND gate; that is equivalent to H=ab'c+ab'c'.
So now you have to construct function F.
To do that, you have the first two terms already, and you need OR this last combination:
F=abc'+a'b'c+H=(abc'+a'b'c)'&H'
This is what you do with the third gate, you invert H and apply it to the input of the first NAND gate, to get the required function.

Take a look at the schematic.
 

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    solus

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Re: Logic Implementation

Can i just ask as to why you are not (OR)ing 4 outputs as shown from the sum of min-terms expression but you only have 3 outputs?

Thanks.
 

Re: Logic Implementation

If you had a 4-input NAND you could do just that. But you only have 3-input NANDs. That was the requirement, use one 74LS138 and one 74LS10.

In fact, I believe the solution is just that, except I am building a 4-input NAND out of NAND gates. That requires you to use one of the gates to invert the output of another.
 

Re: Logic Implementation

How to know which term correspond to which output of the demux?
 

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