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vcvs in hspice is not right......

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shanmei

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I set the gain of vcvs in Hspice simulation from the ADE, but the netlist is:

e1 s2 0 vcvs s1 0 1, so the gain in this netlist is 1, not 2.

the right answer should be:

e1 s2 0 vcvs s1 0 2.

Also, the set the delay of vcvs, in Hpsice netlist, the delay will not present.

When I switched to Spectre in ADE, it is ok.

Do you know why vcvs is not working right in Hspice? Thanks.
 

Your post seems to miss basic information to make a meaningful question. You are quoting a SPICE statement for a voltage controlled voltage source which can't be wrong as such. It can be expected to do what the expression specifies V(s2,0) = 1.0 * V(s1,0).

But what is modelled with this source statement and why are you expecting gain of 2?
 

Sorry for the misunderstanding. I want to have a X2 gain with the help of vcvs.

I edit the vcvs device in schematic, "q" the vcvs device, and put the gain to be 2, but extracted netlist is:
e1 s2 0 vcvs s1 0 1, which means V(s2,0) = 1.0 * V(s1,0), the simulated waveform also showed that V(s2,0) = 1.0 * V(s1,0)

Since I made the gain=2 in the device symbol, the right extracted netlist should be:
e1 s2 0 vcvs s1 0 2, and V(s2,0) = 2.0 * V(s1,0).

I don't know why Hspice in the ADE can't recognize that I have changed the parameter.

Thanks.
 

More basic informations are needed. What is your version of: Hspice, Virtuoso, system (what distribution, etc), 32 or 64 bit executable (both hspice and virtuoso)?
 

Hspice: Hspice-K-2015.06-3
Virtuoso: 6.1.6
host mode: local
64 bit both

It works fine for Spectre, but when I switched the simulator to HspiceD, it has this issue. Thanks.
 

I think FvM is right: must be a bug of the vcvs Hspice model for ADE.
 

Check if for 32bit versions of virtuoso and hspice or only for 32bit virtuoso the problem still exist. If not it could be an issue at linux distribution site, in other case hspice model for vcvs as FvM mentioned.
 
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