Arithmetic circuit divider problem.....

Hello ppl,
I am designing a combinational logic block of which a 6 bit divider is an important part. I came across this issue when I coded the divider in Verilog. Here is the code...

always @(posedge clk) begin

if (rst) Div_Out=0;

else if (highz) Div_Out=6'bz;

else Div_Out=IN1/IN2;

end //end always

testbench:

IN1=6'd4;
IN2=6'd5;

I get the solution as 0 and for those cases when IN1 > IN2, I get 1. I am supposed to get a fractional number (like 0.5, 0.6...etc) as the result for use in my next block. I temporaritly resolved this issue by using

Div_Out=IN1*10/IN2

I get my result as 8 for 0.8 which I can still use.(as it is logic)

But as is obvious I will get hit on my area as well as power if I use that 6 bit multiplier! Is there a better solution that someone knows......please share your info. Will be highly grateful!
Thanks everyone!

Kart

Hello cart ,
Please have a look at the variable Div_Out is it declared as real , beacuse if the registers are not declared as real then it becomes integer division . Please also relook into your library what you requrie is a floating point divider ... does your library support .. if there is no support then you might have to develop your own!!

Hi,
Do you want hdl code to be synthesizable??? If not here is the
solution....

Thanks for your attn guys!
Unfortunately, the design is targetted to be synthesized as an ASIC. So I would have to use synthesizable code only. I don't believe the 'realtobits' is synthesizable....correct me if I'm wrong. And yes, it has to be a floating point divider I think.....right now, Div_out is declared as a wire coz it's routed to another combinational logic module( a MAX module) in my top level unit. How do I declare Div_out as 'real' and still use it as a wire? (Could u give me that statement's syntax?) And how do I check if my library supports Floating point operations? Semiconductorman....could you please clarify? Thanks again!
Kart

No Nand_gates code is not synthesisable ....that is only for simulation ( He has put it at the top of the code ) . Some libararies do have macros that can be directly intantiated for floating point operations many don't ... Get it touch with the guys who have given the asic libarary and inform them about your problem .. if they don't have any such macro then you have to implement the function yourself ! U can't use the divide operator you are currently using

Yeah..... Actually , I 's doing this as an alternative to coding in Spice...to save me some time. I was trying to generate a gate level schematic for the entire combinational block and transfer that to Hspice manually so that I didn't have to waste time designing n optimizing each of the constituent units in that combinational block. Didn't anticipate this issue.... Any further ideas.....always welcome!

The DW may not implement DIV. You need develop the DIV algorithm by yourself.

Actually, I am right now thinking of using the SRT algorithm used in the P4 processor. Seeme like the only viable option left to me. Making the circuit work though is another matter altogether!

hi,

i think you may be familiar with the algorithms tht are available for calculating division effectively by calculcating the inverse of b, b^-1 and then multiply it with a. i think floating point multiplication, u could perform. so, if u could perform the operation of finding the inverse using the algorithm, then u should get a very efficient algorithm. thou the space required to calculate is a little more... there r 2 algorithms which i have seen to calculate a*b^-1. i have them as hardcopy., will try to scan it and post in a couple of days. if u r interested to proceed that ways.. coz its more challenging and effective definitely. u could search for the "BCH algorithm"... if u are not aware of it... i remember the expansion as Bill Cooke Hoover algorithm. hope this helps.

@member

i would scan it and post it here in a day's time!

/cedance

Hi arun,
I will try googling the BCH algorithm.....But yes, I would highly appreciate it if u could post the hard copy of the algorithm or the gate level schematic if u have it......would save me oodles of time! Actually someone else told me something similar....trying to find the inverse of a number and feeding that to a FP multiplier. But the few implementations I came across used a look up table which had 2^n entries for a n bit operand. So for a 6 bit, I thought it's just not worth it. But maybe u have a better algo I think. Thanks man!
Kart

You can use serial solution: subtract and shift ,it needs many cycles
(restoring or non-restoring)
or you can use newton method to get solation of 1/b

That wouldnt be good enough.....I am aiming for a response time of 10-12 ns.