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[Moved]: design of phase locked loop PLL

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cyrax747

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Hi,

I want to design a pll in hspice,how do i get the values for design i mean cap and res values ?? Please help
 

Re: design of phase locked loop PLL

You need to define certain parameters first, like type of PLL - integer or fractional, then reference frequency, frequency divider ratio, KVCO of the VCO, the charge pump charging or discharging current, maybe loop bandwidth and PLL phase margin, etc.
After that you can go through the calculation of the values of loop filter components by following Razavi's book on RF Microelectronics.
Or you can go through the paper - "Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin" by Thompson and Brennan. This paper gives the equations on how to calculate the values of capacitors and resistors in 3rd order and 4th order loop filters taking into account damping coefficient is 1.
 
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