Current Reference - Beta Multiplier

AMSA84 said:

I believe that the delta vbe current source don't have nothing to do with the band gap

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All bandgap references are built around a delta vbe current source.

Using your delta vbe circuit, you can easily add a CTAT current to the PTAT current (see image). Simply adjust Rctat to get a temperature-invariant current.

Thank you all.

Zeker, the figure you posted is a PTAT current source, right? Adding only those two resistores RCTAT I get a PTAT and CTAT current reference at the circuit output?

Bee, I did that, and in fact I got something around 1.6% of error. @25ºC to -40ºC and @25ºC to +125ºC. FRom +25ºC to the highest point in the inverted parabola was less then 1%.

By the way, for a 130nm tech, using an L=4um is too much? I think that using a high L value we improve the matching and Ro of the current mirrors. Right?

The picture that Zeker posted is not a PTAT current source. You know that the difference of 2 PN junctions gives a PTAT voltage. This PTAT voltage makes a PTAT current using Rptat. The VBE voltage across the PNP is CTAT. By adjusting RpTAT, you can make the current through the currnet mirror 1rst order temperature independent.
For more information you can check the paper of Banba that I mentioned earlier.

Longer L has the advantage that you make the output resistance larger. So the current is less dependent on VDD (that is good). Also large transistors give smaller matching errors (also good). However, a large L is bad for speed. The bandwidth of you reference will be limited. Bandwidth is important to make sure that noise from the supply is attenuated. E.g. suppose that you have a circuit that uses a pulsed current from 0-1mA with a frequency of 1MHz. This can give a 1MHz voltage ripple on your supply voltage. In order to attenuate that 1MHz ripple as best as possible you want a large bandwdith. With a simple circuit you don't have to worry about such things and long L is good. But for some applications it's better to use minimum L or 2* minimum L.

Nice input bee. Thanks.

Regarding the PN junction, yes, a PN has a CTAT behavior. But when you use 2 PN junctions their difference is a PTAT. So that is what is done in that circuit, without the RcTAT. As long as the voltage above the resistor in series with the PNP on the right arm is the same as the voltage across the BJT. Now, by adding those resistors RcTAT, means that I don't need to use other circuit to get a IcTAT current and then sum the two currents to get a Iic?

Concerning the L, well, supposing that indeed it is best to have a large, since the node here is 130nm, it is reasonable to use a large L as 4um? Or that is too much?

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By the way, if I want to determine what is the behaviour of a certain type of resistance with temperature (rpoly, rhpoly, n-well, etc) can I do this simple test:

VDD -> IDC -> resistor -> GND. Then sweep the temperature and plot the current?

Yes, that is a good way to determine the temperature coefficients of the different resistors. You can now plot the resistor value by plotting 1/i(resistor) if you have a 1V supply.
You can also do it with a current source instead of voltage source, you then only have to plot the voltage at the output of the current source.

About the lenght: choose it as large as it must be for good enough output impedance. You can do a simulation with an AC source in series with your supply and check hoe large the voltage is at the output of the current reference with different Length. Actually, you then simulate the PSRR, so a low value is better. If you have only some dB difference between say L=1um or L=5um, choose L=1um and adjust the multiplier if the transistor size is not large enough for good matching.

Because you have to use the same transistor sizes in the circuit that actually uses the reference current, 4um might be too large for practical reasons (e.g. area requirements if you mirror it 1:10 or a low vdsat. If your PSRR simulation shows that you want e.g. a L of 10um, you can also choose for a cascode structure to make the reference more supply voltage independent.

Okay. I'll try that.

How can I simulate the PSSR of the current source?

My reply wasn't really complete. Sorry. Maybe PSRR is also not that important yet.
Anyway, you can simulate the PSRR by setting a AC source in series with your supply voltage source. Then measure the bias voltage (either pmos or nmos, nmos will probably have a better value). You can see in this graph how supply noise is attenuated (or not), dependent on it's frequency. I think you will see some effects on the bandwidth of the beta multiplier in this graph and the effect of capacitors that you may have added for stability. But I haven't tried it myself. It's ok to skip the PSRR if it only make things too complicated.

However, it's good to do a DC sweep were you sweep the DC source from e.g. 2.5 to 3.3V. I think you will see the effect of different Length the most clear in the DC sweep, but also in the PSRR plot (again, I haven't checked that myself).