amntt
Advanced Member level 4
i want to design dc biase and matching circuite of atf36077 transistor inorder to have s21=0db in 5gh to 8 ghz with adsView attachment transistor.pdf . anyone knows the procedure?
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isolator , it pass s21 but dont let s12 to pass i just need to have s21=0db and phase -20<phase s21<-180 as shown in the pictureWhat does this circuit serve ?? If you intend to implement a Buffer with a <0 Gain, you should use a Emitter/Source follower ( Collector/Drain grounded) configuration.