[SOLVED] Need help with Adjustable Freq. Anti-Alias Filter

I am attempting to address the following recurring situation in the optics lab I work in:
1) Our Amplified Photodiodes output at 0-10V.
2) The ADCs we use are generally 14 to 16 bits, with -10 to +10 Volt Ranges.
3) The sampling rate of the ADCs varies depending on application (Samps/sec split among input channels) (the NI USB-6009 as an example). Therefore, the filter cut-off needs to be adjustable as well.
4) The gain between the Photodiode and the ADC sometimes needs to be varied automatically.
5) We digitize spectroscopy signals, which need to retain their shape (linear phase).
6) My experience with circuit design is limited, and I need a design I can't easily screw up.

On bouncing around the web, I ran across the Linear Technologies 1064-7, an 8th order, monolithic, switched capacitor low-pass filter with some kind of enhanced Bessel response (linear phase, compromise in roll-off). I'd like to cascade these together (to sharpen up the roll-off). I've attached an image of the overall circuit idea.

Question: What trade-offs, or potential disasters, am I overlooking here? Is this design worth pursuing?

Thanks in advance to anyone willing to weigh in here.

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Sorry guys, I'm having trouble uploading the image. I'll try again tomorrow.

I dont believe that the SNR of a SC filter is appropriate for a high performance 14 or even 16 Bit ADC.

Hmmmm. I might have some things I need to learn about there. I was planning on filtering the clock frequency noise coming out of the filter (50 or 100 times the filter cutoff frequency). The only other noise statistic the spec. sheet gives is a Wideband Noise of 115 microVrms. The step size of my 16 bit ADC is ~300 microVolts.

In any case, I think I finally got the image to upload.

The S/N for that filter is generally slightly better than 70dB which corresponds to about 12Bits so, as FvM noted, it may not be sufficient for your 14-16 bit converter needs. This might work better which is capable of over 100dB S/N.

You said you want to cascade the filters, but you likely will gain little by cascading more than one 8th order filter unless the A/D sample rate is close to twice the maximum signal frequency and it should be well above that to help minimize anti-alias filter requirements. What is the maximum signal frequency, the A/D sample frequency, and the noise level you need to attenuate?

sheet gives is a Wideband Noise of 115 microVrms. The step size of my 16 bit ADC is ~300 microVolts.

Click to expand...

The relation changes when scaling the maximum SC filter output ADC range...

I didn't read the SC datasheet thoroughly enough to predict the exact SNR achievable in your application, I don't even know, if the datasheet specifications are sufficient. But SC filters are known not to expose excellent SNR numbers. THD will probably add when operating the filter at maximum level. If you can live with 12 bit (or slightly better) noise free resolution, SC are an option.

Hi. Sorry I took so long to reply. The LTC 1564 crutschow recommended is definitely the way for me to go, and I've been working out the rest of the circuit. Once I get that figured out, I'll post back here with the schematic, just to complete the thread.

Thanks a bunch everyone for your help. Have a great day.

--Brad