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How to eliminate "assign" after DC synthesis?

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kermit

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dc synthesis remove assigns

In my design,some signals like this:
module test ( a,b,...... )
input a;
output b;
......

assign a = b;
endmodule

After synthesis,this statement didnot substitute by inserting a buffer!But this statement cant be recognized by Encounter.
How to eliminate this "assign"?
 

set_boundary_optimization * assign

Hi kermit:

You can use "set_fix_multiple_port_nets" to solve this problem! :)

wang1
 

Hi,

I tried the suggested fix couldnot do it. Can you please elaborate on this.


Thanks,
Narayana.
 

After setting "set_fix_multiple_port_nets" true, you have to resynthesis and write the verilog out, then you will get the netlist without "assign". Hope this suggesstion is helpful to you. :)
:wink:
 

Make sure you invoke the command with the following options:
set_fix_multiple_port_nets -all -buffer_constants

Missing the -buffer_constants could cause you to still have some assign statements. Also, make sure you are not doing a "set_dont_touch" on some of the modules that contain assign statements...
 

i meet the same problem,

if u can't remove assign , edit it directly ......
 

when you have tri_state bus or ports ,you will have "assign ";or when you have some unconnected pins ,you will have the "assign ".
You can add boundary_optimization and set fix to remove the "assign"
 

Hi, microww.
“set_boundary_optimization true”
This compile setting is not used. It could change the logic of your subdesigns. So we do not use it in DC.
 

"edit it directly" is not the best method. you had better use "set_fix_multiple_port_nets".
 

set verilog_out_no_tri true
set_fix_multiple_port_nets -all -buffer

This should fix your problem. Note, you need to apply this for every design your read.
 

It seems no problem, when use assign to change net name in a module.
 

One book say it incompatible with "some" P&R tools, but I did not meet this problem, I use SE and Soc Encounter.
 

use ' change_names -rule verilog -hierarchy ' before write out verilog format netlist.
 
set verilog_out_no_tri true
set_fix_multiple_port_nets -all -buffer
 

Carrie, best thanks. Using "set_fix_multiple_port_nets" without "change_names" I couldn't remove "assign" from netlist.
 

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