desperatejobseeker
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Hi all,
An NMOS is dioded-connected, that has its Gate/Drain tied to another PMOS gate and both its body and souce are tied to gnd. I saw many schematics using this kind of structure, I wonder how it could work? Although for the NMOS Vds>Vgs-Vth, from my perspective, there is no voltage bias at Gate/Drain, cuz they r only tied together to the gate of another PMOS. How could it possible work?
Thanks in advance!
An NMOS is dioded-connected, that has its Gate/Drain tied to another PMOS gate and both its body and souce are tied to gnd. I saw many schematics using this kind of structure, I wonder how it could work? Although for the NMOS Vds>Vgs-Vth, from my perspective, there is no voltage bias at Gate/Drain, cuz they r only tied together to the gate of another PMOS. How could it possible work?
Thanks in advance!