Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[SOLVED] What is mean "uncontrollable clock input of flip-flop violation"?

Status
Not open for further replies.
U

u24c02

Advanced Member level 1
Joined
May 8, 2012
Messages
404
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
4,101
Hi
When i using dft_compiler, it's happen error as following.

6 "uncontrollable clock input of flip-flop violation"
2 "clock not able to capture violations"

What is mean "uncontrollable clock input of flip-flop violation" and "clock not able to capture violations"?

How can i hand of this problem?
 

If Test clock does not reach flip-flop, then during atpg, when tclk toggles, the flip-flop will not be able to scan data through the flip-flop. That is why you are getting "uncontrollable clock input of flip-flop violation". This error is usually there if clock divider is used or some other logic is used to drive the clock pin instead of directly using the clock.

One way to fix it just use the mux to bypass the logic and select the tclk while in test_mode, else functional clock will be used.
 

You can also use auto fix option in DFT_compiler,to fix these clock violations. The tool itslef will add the mux.
 
  • Like
Reactions: u24c02

    U

    u24c02

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top