What is the BF MOAT layer?

Hello ALl,

I've been using the IBM 0.13 um RF CMOS process. What is meant by the BF MOAT layer? What is its use in the CMOS process?

Regards,
Mohammed Omar

elmolla said:

Hello ALl,

I've been using the IBM 0.13 um RF CMOS process. What is meant by the BF MOAT layer? What is its use in the CMOS process?

Regards,
Mohammed Omar

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I'm investigating this same topic as well and it looks like it's a way to create isolation. If you look on page 430 of the design manual, you can see what it looks like and how designing the ring a certain way can produce different resistance.

This is a quote from the manual below.

"By designing a BFMOAT level, the designer may insert a resistive element between different regions of the
substrate. This may be useful to reduce the coupling of substrate noise between two regions on the same
chip."

Mike

elmolla said:

What is meant by the BF MOAT layer?

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AFAIR (physically) a high energy boron fluoride (BF₂⁺) implant which damages the silicon lattice, i.e. its conductivity, and so creates higher resistive domains in order to isolate several substrate regions from each other.

erikl said:

AFAIR (physically) a high energy boron fluoride (BF₂⁺) implant which damages the silicon lattice, i.e. its conductivity, and so creates higher resistive domains in order to isolate several substrate regions from each other.

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Hi erikl

I'm not sure that's correct. As far as I know BF2 is a common dopant for p-type doping, more info here (**broken link removed** on page 12), it seems like it's used in CMOS for forming shallow p+ junction. I'm not familiar with IBM PDKs, but I suspect BFMOAT is blocking p+ implant, so that the BFMOAT drawn region you get lightly doped silicon (if not implanted by other steps, it is the p-type starting wafer), therefore you get a high resistance between parts you want to isolate.

If in certain situations damage to silicon lattice is needed, I think people usually implant H+. But I doubt that's what's happening here.

regards,
Ran

snaildr said:

... I suspect BFMOAT is blocking p+ implant, so that the BFMOAT drawn region you get lightly doped silicon (if not implanted by other steps, it is the p-type starting wafer), therefore you get a high resistance between parts you want to isolate.

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Yes, I think you could be right! Thank you for mentioning this possibility! On the other hand -- then I can't see a justification for the expression MOAT !?

erikl said:

Yes, I think you could be right! Thank you for mentioning this possibility! On the other hand -- then I can't see a justification for the expression MOAT !?

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Hi erikl

I think the expression MOAT makes sense because this layer blocks BF2 doping and makes a resistive guardring around the circuit part you want to isolate, just a like a moat.

regards,
Ran

snaildr said:

... this layer blocks BF2 doping and makes a resistive guardring around the circuit part you want to isolate, just a like a moat.

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Hi Ran,

yes I understand you're right. I always imagined a moat as something going (actively) and deeply down, like a trench or a deep n-well. But here it is the (passively) quite well isolating high resistivity substrate. Thank you!

Cheers, erikl

BF MOAT blocks all implants to the substrate. It can also be used th block buried layer implants prior to epitaxy in bipola and high voltage processes.